Datasheet

Figure 24-12. System Time Update Using Fine Correction Method
EMACTIMADD
Accumulator Register
Constant Value
EMACTIMNANO
EMACTIMSEC
+
+
EMACTIMSTCTRL.
ADDREGUP
Increment the
Sub-Seconds Register
Increment the
Seconds Register
Note: If the Ethernet Controller is configured to use the MII/RMII interface to an external PHY,
then the MOSC clock that feeds the PTP reference clock to the System Time Module has
a minimum frequency requirement of 5 MHz and a maximum frequency of 25 MHz. For
course correction methods, the value of MOSC can be anywhere within this range, but for
the fine correction method, a 25 MHz value MOSC crystal should be used for the best
accuracy. If the Ethernet Controller is configured to use the MII interface connected to the
integrated PHY, then the MOSC clock that feeds the PTP reference clock to the System
Time Module must be 25 MHz because it also clocks the integrated PHY module.
Initially, the Ethernet's slave clock (from the MOSC) is adjusted with a compensation value (as
described in the previous paragraph) which is written to the Timestamp Addend Register (TSAR)
field in the EMACTIMADD register. This value is calculated as: FreqCompensationValue
0
= TSAR
= 2
32
/ FreqDivisionRatio.
The System Time Module requires a 20-MHz PTP reference clock frequency to achieve 50-ns
accuracy in the fine correction method. An addend must be written to the Ethernet MAC Time
Stamp Addend (EMACTIMADD) register, offset 0x718 to achieve timing synchronization. If the
MOSC clock source is 25 MHz, the frequency division ratio (FreqDivisionRatio) of the two is calculated
as 25 MHz / 20 MHz = 1.25. Hence, the default addend value to be set in the register is 2
32
/ 1.25
or 0xCCCC.CCD0. If the reference clock drifts lower, to 24 MHz for example, the ratio is 24 / 20, or
1.2 and the value to set in the addend register is 2
32
/ 1.20, or 0xDFF1.65D2. The software must
1633December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller