Datasheet

Table 24-16. Enhanced Transmit Descriptor 0 (TDES0) (continued)
DescriptionBit
IHE: IP Header Error
When set, this bit indicates that the Checksum Offload engine detected an IP header error. This bit is valid only
when TX Checksum Offload is enabled. Otherwise, it is reserved. If the Checksum Offload Engine detects an
IP header error, it still inserts an IPv4 header checksum if the Ethernet Type field indicates an IPv4 payload.
16
ES: Error Summary
Indicates the logical OR of the following bits:
■ TDES0[16]: IP Header Error
■ TDES0[14]: Jabber Timeout
■ TDES0[13]: Frame Flush
■ TDES0[12]: Payload Checksum Error
■ TDES0[11]: Loss of Carrier
■ TDES0[10]: No Carrier
■ TDES0[9]: Late Collision
■ TDES0[8]: Excessive Collision
■ TDES0[2]: Excessive Deferral
■ TDES0[1]: Underflow error
15
JT: Jabber Timeout
When set, this bit indicates that the MAC transmitter has experienced a jabber timeout. This bit can only be set
when the Jabber Disabled (JD) bit of the EMACCFG register is clear.
14
FF: Frame Flushed
When set, this bit indicates that the DMA flushed the frame because of a software flush command given by the
CPU.
13
IPE: IP Payload Error
When set, this bit indicates that MAC transmitter detected an error in the TCP, UDP, or ICMP IP datagram
payload. The transmitter checks the payload length received in the IPv4 or IPv6 header against the actual number
of TCP, UDP, or ICMP packet bytes received from the application and issues an error status in case of a mismatch.
12
LC: Loss of Carrier
When set, this bit indicates that Loss of Carrier occurred during frame transmission. This is valid only for the
frames transmitted without collision and when the MAC operates in half-duplex mode.
11
NC: No Carrier
When set, this bit indicates that the carrier sense signal form the PHY was not asserted during transmission.
10
LC: Late Collision
When set, this bit indicates that frame transmission was aborted due to a collision occurring after the collision
window (64 byte times including Preamble in MII Mode). Not valid if Underflow Error (bit 1) is set.
9
Excessive Collision
When set, this bit indicates that the transmission was aborted after 16 successive collisions while attempting to
transmit the current frame. If the Disable Retry (DR) bit in EMACCFG register is set, this bit is set after the first
collision and the transmission of the frame is aborted.
8
VF: VLAN Frame
When set, this bit indicates that the transmitted frame was a VLAN-type frame.
7
CC: Collision Count
This 4-bit counter value indicates the number of collisions occurring before the frame was transmitted. The count
is not valid when the Excessive Collision bit (TDES0[8]) is set.
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December 13, 20131616
Texas Instruments-Advance Information
Ethernet Controller