Datasheet

Table 24-7. Receive Descriptor 0 (RDES0) (continued)
DescriptionBit
DE: Descriptor Error
When set, this bit indicates a frame truncation caused by a frame that does not fit within the current descriptor
buffers, and that the DMA does not own the Next Descriptor. The frame is truncated. This field is valid only when
the Last Descriptor (RDES0[8]) is set.
14
SAF: Source Address Filter Fail
When set, this bit indicates that the SA field of frame failed the SA Filter in the MAC.
13
LE: Length Error
When set, this bit indicates that the actual length of the frame received and the Length/ Type field do not match.
This bit is valid only when the Frame Type (RDES0[5]) bit is reset. Length error status is not valid when CRC
error is present.
12
OE: Overflow Error
When set, this bit indicates that the received frame is damaged because of buffer overflow in RX FIFO.
Note: This bit is set only when the DMA transfers a partial frame to the application. This happens only when
the RX FIFO is operating in the threshold mode. In the store-and-forward mode, all partial frames are
dropped completely in RX FIFO.
11
VLAN: VLAN Tag
When set, this bit indicates that the frame pointed to by this descriptor is a VLAN frame tagged by the MAC. The
VLAN tagging depends on checking VLAN fields of the received frame configured in the Ethernet MAC VLAN
Tag (EMACVLANTG) register, offset 0x01C
10
FS: First Descriptor
When set, this bit indicates that this descriptor contains the first buffer of the frame. If the size of the first buffer
is 0, the second buffer contains the beginning of the frame. If the size of the second buffer is also 0, the next
Descriptor contains the beginning of the frame.
9
LS: Last Descriptor
When set, this bit indicates that the buffers pointed to by this descriptor are the last buffers of the frame.
8
IPC Checksum Error or Giant Frame
When set, this bit indicates an error in the IPv4 or IPv6 header. This error can be because of inconsistent Ethernet
Type field and IP header Version field values, a header checksum mismatch in IPv4, or an Ethernet frame lacking
the expected number of IP header bytes.
7
LC: Late Collision
When set, this bit indicates that a late collision has occurred while receiving the frame in half-duplex mode.
6
FT: Frame Type
When set, this bit indicates that the Receive Frame is an Ethernet-type frame (the LT field is greater than or equal
to 1,536). When this bit is reset, it indicates that the received frame is an IEEE802.3 frame. This bit is not valid
for Runt frames which are less than 14 bytes. In addition when the IPC bit is set in the EMACCFG register, this
bit conveys different information. See Table 24-8 on page 1611.
5
RWT: Receive Watchdog Timeout
When set, this bit indicates that the Receive Watchdog Timer has expired while receiving the current frame and
the current frame is truncated after the Watchdog Timeout.
4
RE: Receive Error
When set, this bit indicates that an error occurred during fame reception.
3
DE: Dribble Bit Error
When set, this bit indicates that the received frame has a non-integer multiple of bytes (odd nibbles). This bit is
valid only in MII Mode.
2
CE: CRC Error
When set this bit indicates that a Cyclic Redundancy Check (CRC) Error occurred on the received frame. This
field is valid only when the Last Descriptor (RDES0[8]) is set..
1
December 13, 20131610
Texas Instruments-Advance Information
Ethernet Controller