Datasheet

Figure 24-6. TX DMA OSF Mode Operation Using Normal Descriptors
Previous frame
status available
Start Tx DMA
(Re-)fetch next
descriptor
Write status word to
prev frame’s TDES0
Transfer data from
buffer(s)
bit set?
Frame xfer
complete?
Timestamp
present?
Write timestamp to
TDES2 & TDES3
for previous frame
Stop Tx DMA
No
Yes
No
Yes
No
Start
Yes
Close intermediate
descriptor
No
No
Wait for previous
frame’s Tx status
Second
frame?
Yes
Ye s
No
Yes
Ye s
Write timestamp to
TDES2 and TDES3
for previous frame
Yes
Timestamp
present?
Yes
Write status word to
prev. frame’s TDES0
Tx DMA suspended
Yes
No
Yes
No
No
Poll
demand
No
No
A
A
No pending
status and
Start = 0
Error
Condition?
Error
Condition?
Error
Condition?
Error
Condition?
Error
Condition?
Error
Condition?
OWN
If using Enhanced Descriptors, TDES2 and TDES3 are replaced with TDES6 and TDES7.
Transmit Frame Processing
The TX DMA expects that the data buffers contain complete Ethernet frames, excluding preamble,
pad bytes, and Frame Check Sequence (FCS) fields. The Destination Address (DA), Source Address
(SA), and Type/Length fields must contain valid data. If the Transmit Descriptor indicates that the
MAC must disable CRC or PAD insertion, the buffer must have complete Ethernet frames (excluding
preamble), including the CRC bytes. Frames can be data-chained and can span several buffers.
1599December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller