Datasheet

Register 6: 1-Wire Raw Interrupt Status (ONEWIRERIS), offset 0x104
The 1-Wire Raw Interrupt Status (ONEWIRERIS) register contains the raw interrupt status. If any
of these bits read 1, the processor is interrupted if the corresponding masked interrupt status bit is
set.
1-Wire Raw Interrupt Status (ONEWIRERIS)
Base 0x400B.6000
Offset 0x104
Type RO, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
RSTOPCNOATRSTUCKDMAreserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x000ROreserved31:5
DMA Done Raw Interrupt Status
DescriptionValue
No interrupt0
DMA transfer complete and an interrupt is pending.1
0RODMA4
Stuck Status Raw Interrupt Status
When unmasked, this interrupt indicates a line-hold-low error is detected.
DescriptionValue
No interrupt0
Stuck status (line-hold-error) is detected and an interrupt is
pending.
1
0ROSTUCK3
No Answer-to-Reset Raw Interrupt Status
DescriptionValue
No interrupt0
A No Answer-to-Reset is detected from the last reset and an
interrupt is pending.
1
0RONOATR2
December 13, 20131526
Texas Instruments-Advance Information
1-Wire Master Module