Datasheet

DescriptionResetTypeNameBit/Field
Operation Complete Interrupt Mask
If this bit is set to a 1, an interrupt is sent when a write, read, or write/read
completes. If a read or read/write transfer has occurred then the read
data is ready to be accessed when this bit is set in the ONEWIRERIS
register.
DescriptionValue
The operation complete interrupt is suppressed and not sent to
the interrupt controller.
0
The operation complete interrupt is sent to the interrupt controller
when the OPC bit in the ONEWIRERIS register is set.
1
0RWOPC1
Reset Interrupt Mask
DescriptionValue
The reset interrupt is suppressed and not sent to the interrupt
controller.
0
The reset interrupt is sent to the interrupt controller when the
RST bit in the ONEWIRERIS register is set.
1
0RWRST0
1525December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller