Datasheet

To setup a read, write or mixed transaction, the following configuration needs to occur:
■ For writes, the 1-Wire Data Write (ONEWIREDATW) register must first be written with one, two,
three or four bytes to send (as a word). Next the ONEWIRECS register is configured as described
above.
■ For reads, the ONEWIRECS register is written as described above. Then, when the transaction
is complete, the 1-Wire Data Read (ONEWIREDATR) register is read to collect the one, two,
three or four bytes that were received (as a word).
■ For write/read combination, the ONEWIREDATW register is written with one, two, three or four
bytes to write or read. Then, the ONEWIRECS register is configured as described above. As the
data is transferred from the ONEWIREDATW register to the 1-Wire line, any 1 that is transmitted
creates a read that is registered in the ONEWIREDATR register. When the entire transaction is
complete, the ONEWIREDATR register can be read to collect the bytes that were received by
the 1-Wire Master. A ONEWIREDATR register bit contains a 0 for any bit that was written as a
0, a 1 for any bit that was written as a 1 or any bit not modified by the slave (may have been
intentional 1 or ignored) and a 0 for any bit written as a 1 but read back as a '0.'
22.3.6 Search (Enumeration) and Sub-Byte
Although 1-Wire is a byte protocol, there are times when less than a byte must to be written or read.
By programming the BSIZE field of the ONEWIRECS register, the number of bits to write and or
read in the last byte can be configured. The BSIZE field can be used for a 1-Wire search
(enumeration) to allow detect and select processing. Enumeration begins by executing the standard
SEARCH (0xF0) command (and if available, the ALARM SEARCH (0xEC)) and then reading two
bits for the ID, which is the first bit and its complement. Subsequently, a bit is emitted to select
devices with that first matching bit followed by another read of two bits. This process is repeated
for up to all 64 bits. To start over, a reset is used. In this way, a tree of IDs can be broken down until
one unique ID is left. This can be repeated for each device. The BSIZE field can also be used for
non-standard devices which do not fully follow protocol.
22.3.7 Interrupts
The interrupt model for the 1-Wire module allows interrupt service routines to drive continuations
of operations, whether reading the results or processing more bytes. Most command sequences
are small, so the module supports transactions of one, two, three, and four bytes at once. Because
most commands start with a line reset, the operational model allows for a reset followed by the
transaction, with an interrupt occurring when the transaction is complete. There is also support for
enabling interrupts for reset complete (RST), no answer-to-reset (NOATR) and line-hold-low error
detected (STUCK) in the 1-Wire Interrupt Mask (ONEWIREIM) register.
22.3.8 DMA
The µDMA model is designed to support both normal µDMA operation on write or read, as well as
scatter-gather operation. The normal mode of operation allows for continued writes of byte, half-word,
or word (three-byte size is not supported by µDMA for repeated operation) as well as continued
reads by byte, half-word, or word. Additionally, the first transaction may be started with a reset.
The 1-Wire DMA Control (ONEWIREDMA) register is used to configure the µDMA. To use µDMA
with 1-Wire transmits:
1. Select 1-Wire to use µDMA by programming the DMA Channel Map Select n (DMACHMAPn)
register in the µDMA. See “Channel Assignments” on page 709 for more information.
December 13, 20131512
Texas Instruments-Advance Information
1-Wire Master Module