Datasheet

Figure 22-5. 1-Wire Master Receiving a 1 Signal from a Slave
1 µs to < 15 µs
60 µs
OWIRE
signal
Master
drives low
and then
releases
the bus
Master samples here (to
see if low or high); in this
case, the Master
receives a ‘1’ from the
slave
Figure 22-6. 1-Wire Master Receiving a 0 Signal from a Slave
60 µs
OWIRE
signal
Slave
releases to
float high
Slave holds
low
Master
drives low
and then
releases
the bus
Master samples here (to
see if low or high); in this
case, the Master
receives a ‘0’ from the
slave
22.3.2 Transport Protocol
The transport level protocol follows a simple model, in part based on treating most 1-wire devices
as memory like (IDs, ROM, EEPROM, etc) even if some are sensors or actuators. All commands
and data are in 8-bit (byte) quantities and the post-reset commands are pre-defined. The basic
protocol is:
Reset the line by driving and holding the OWIRE signal low for >480 µs.
Wait for answer-to-reset from one or more slaves. Answer-to-reset (ATR) is defined as each
slave pulling the line low for 60 µs to 240 µs. If the line does not go low, there is no slave on the
bus. If it does, there is one or more.
At this point the Master either figures out the ID of the slaves on the bus using the enumeration
scheme, or selects a slave to issue a command. The "select" command to use is based on
1509December 13, 2013
Texas Instruments-Advance Information
Tiva
TM4C129XNCZAD Microcontroller