Datasheet

Note: Pull-ups can be used to avoid unnecessary toggles on the QSSI pins, which can take

the slave to a wrong state. In addition, if the SSIClk signal is programmed to steady

state high through the SPO bit in the SSICR0 register, then software must also configure

the GPIO port pin corresponding to the SSInClk signal as a pull-up in the GPIO Pull-Up

Select (GPIOPUR) register, GPIO offset 0x510.

For each of the frame formats, the QSSI is configured using the following steps:

1. If initializing out of reset, ensure that the SSE bit in the SSICR1 register is clear before making

any configuration changes. Otherwise, configuration changes for Advanced SSI can be made

while the SSE bit is set.

2. Select whether the QSSI is a master or slave:

a. For master operations, set the SSICR1 register to 0x0000.0000.

b. For slave mode (output enabled), set the SSICR1 register to 0x0000.0004.

c. For slave mode (output disabled), set the SSICR1 register to 0x0000.000C.

3. Configure the QSSI clock source by writing to the SSICC register.

4. Configure the clock prescale divisor by writing the SSICPSR register.

5. Write the SSICR0 register with the following configuration:

■ Serial clock rate (SCR)

■ Desired clock phase/polarity, if using Freescale SPI mode (SPH and SPO)

■ The protocol mode: Freescale SPI or TI SSF

■ The data size (DSS)

6. Optionally, configure the μDMA channel (see “Micro Direct Memory Access (μDMA)” on page 707)

and enable the DMA option(s) in the SSIDMACTL register.

7. If this is the first initialization out of reset, enable the QSSI by setting the SSE bit in the SSICR1

As an example, assume the QSSI must be configured to operate with the following parameters:

■ Master operation

■ Freescale SPI mode (SPO=1, SPH=1)

■ 1 Mbps bit rate

■ 8 data bits

Assuming the system clock is 20 MHz, the bit rate calculation would be:

SSInClk = SysClk / (CPSDVSR * (1 + SCR))

1x10

= 20x10

/ (CPSDVSR * (1 + SCR))

In this case, if CPSDVSR=0x2, SCR must be 0x9.

December 13, 20131390

Texas Instruments-Advance Information

Quad Synchronous Serial Interface (QSSI)