Datasheet

20 Quad Synchronous Serial Interface (QSSI)
The TM4C129XNCZAD microcontroller includes four Quad-Synchronous Serial Interface (QSSI)
modules. All four of the modules support Advanced and Bi-SSI interfaces as well as a Quad-SSI
enhancement to provide faster throughput of data. The QSSI module acts as a master or slave
interface for synchronous serial communication with peripheral devices that have either Freescale
SPI, or Texas Instruments synchronous serial interfaces. The QSSI performs serial-to-parallel
conversion on data received from a peripheral device. The transmit and receive paths are buffered
with internal, independent FIFO memories allowing up to eight 16-bit values in Legacy mode and
8-bit values in Advanced, Bi-, and Quad-modes. The CPU can accesses data in these FIFOs as
well as the QSSI's control and status information. A µDMA interface is also provided to allow the
transmit and receive FIFOs to be programmed as source/destination addresses in the µDMA module.
The TM4C129XNCZAD QSSI modules have the following features:
■ Four QSSI channels with Advanced, Bi- and Quad-SSI functionality
■ Programmable interface operation for Freescale SPI or Texas Instruments synchronous serial
interfaces in Legacy Mode. Support for Freescale interface in Bi- and Quad-SSI mode.
■ Master or slave operation
■ Programmable clock bit rate and prescaler
■ Separate transmit and receive FIFOs, each 16 bits wide and 8 locations deep
■ Programmable data frame size from 4 to 16 bits
■ Internal loopback test mode for diagnostic/debug testing
■ Standard FIFO-based interrupts and End-of-Transmission interrupt
■ Efficient transfers using Micro Direct Memory Access Controller (µDMA)
– Separate channels for transmit and receive
– Receive single request asserted when data is in the FIFO; burst request asserted when FIFO
contains 4 entries
– Transmit single request asserted when there is space in the FIFO; burst request asserted
when four or more entries are available to be written in the FIFO
– Maskable µDMA interrupts for receive and transmit complete
■ Global Alternate Clock (ALTCLK) resource or System Clock (SYSCLK) can be used to generate
baud clock.
20.1 Block Diagram
The following figure below shows a block diagram of an QSSI module with Advanced, Bi- and
Quad-SSI.
1375December 13, 2013
Texas Instruments-Advance Information
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TM4C129XNCZAD Microcontroller