Datasheet

The first thing to consider when programming the UART is the baud-rate divisor (BRD), because
the UARTIBRD and UARTFBRD registers must be written before the UARTLCRH register. Using
the equation described in “Baud-Rate Generation” on page 1313, the BRD can be calculated:
BRD = 20,000,000 / (16 * 115,200) = 10.8507
which means that the DIVINT field of the UARTIBRD register (see page 1333) should be set to 10
decimal or 0xA. The value to be loaded into the UARTFBRD register (see page 1334) is calculated
by the equation:
UARTFBRD[DIVFRAC] = integer(0.8507 * 64 + 0.5) = 54
With the BRD values in hand, the UART configuration is written to the module in the following order:
1. Disable the UART by clearing the UARTEN bit in the UARTCTL register.
2. Write the integer portion of the BRD to the UARTIBRD register.
3. Write the fractional portion of the BRD to the UARTFBRD register.
4. Write the desired serial parameters to the UARTLCRH register (in this case, a value of
0x0000.0060).
5. Configure the UART clock source by writing to the UARTCC register.
6. Optionally, configure the µDMA channel (see “Micro Direct Memory Access (μDMA)” on page 707)
and enable the DMA option(s) in the UARTDMACTL register.
7. Enable the UART by setting the UARTEN bit in the UARTCTL register.
19.5 Register Map
Table 19-3 on page 1322 lists the UART registers. The offset listed is a hexadecimal increment to the
register's address, relative to that UART's base address:
■ UART0: 0x4000.C000
■ UART1: 0x4000.D000
■ UART2: 0x4000.E000
■ UART3: 0x4000.F000
■ UART4: 0x4001.0000
■ UART5: 0x4001.1000
■ UART6: 0x4001.2000
■ UART7: 0x4001.3000
The UART module clock must be enabled before the registers can be programmed (see page 404).
There must be a delay of 3 system clocks after the UART module clock is enabled before any UART
module registers are accessed.
The UART must be disabled (see the UARTEN bit in the UARTCTL register on page 1337) before any
of the control registers are reprogrammed. When the UART is disabled during a TX or RX operation,
the current transaction is completed prior to the UART stopping.
Note: Registers that contain bits for modem control or status only apply to the following UARTs:
■ UART0 (modem flow control and modem status)
■ UART1 (modem flow control and modem status)
1321December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller