Datasheet

Register 42: ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4
This register contains the configuration information for a sample executed with Sample Sequencer
3. This register is 4 bits wide and contains information for one possible sample. See the ADCSSCTL0
register on page 1259 for detailed bit descriptions.
Note: When configuring a sample sequence in this register, the END0 bit must be set.
ADC Sample Sequence Control 3 (ADCSSCTL3)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0x0A4
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
D0END0IE0TS0reserved
RWRWRWRWROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:4
1st Sample Temp Sensor Select
DescriptionValue
The input pin specified by the ADCSSMUXn register is read
during the first sample of the sample sequence.
0
The temperature sensor is read during the first sample of the
sample sequence.
1
0RWTS03
Sample Interrupt Enable
DescriptionValue
The raw interrupt is not asserted to the interrupt controller.0
The raw interrupt signal (INR0 bit) is asserted at the end of this
sample's conversion. If the MASK0 bit in the ADCIM register is
set, the interrupt is promoted to the interrupt controller.
1
It is legal to have multiple samples within a sequence generate interrupts.
0RWIE02
End of Sequence
This bit must be set before initiating a single sample sequence.
DescriptionValue
Sampling and conversion continues.0
This is the end of sequence.1
0RWEND01
December 13, 20131290
Texas Instruments-Advance Information
Analog-to-Digital Converter (ADC)