Datasheet

DescriptionResetTypeNameBit/Field
One-Shot/Periodic Interrupt Disable
DescriptionValue
Time-out interrupt functions normally0
Time-out interrupt functionality is disabled1
0RWTBCINTD12
GPTM Timer B PWM Legacy Operation
DescriptionValue
Legacy operation with CCP pin driven Low when the
GPTMTAILR is reloaded after the timer reaches 0.
0
CCP is driven High when the GPTMTAILR is reloaded after the
timer reaches 0.
1
This bit is only valid in PWM mode.
0RWTBPLO11
GPTM Timer B Match Register Update
DescriptionValue
Update the GPTMTBMATCHR register and the GPTMTBPR
register, if used, on the next cycle.
0
Update the GPTMTBMATCHR register and the GPTMTBPR
register, if used, on the next timeout.
1
If the timer is disabled (TBEN is clear) when this bit is set,
GPTMTBMATCHR and GPTMTBPR are updated when the timer is
enabled. If the timer is stalled (TBSTALL is set), GPTMTBMATCHR and
GPTMTBPR are updated according to the configuration of this bit.
0RWTBMRSU10
GPTM Timer B PWM Interrupt Enable
This bit enables interrupts in PWM mode on rising, falling, or both edges
of the CCP output as defined by the TBEVENT field in the GPTMCTL
register.
In addition, when this bit is set and a capture event occurs, Timer B
automatically generates triggers to the ADC and DMA if the trigger
capability is enabled by setting the TBOTE bit in the GPTMCTL register
and the CBEDMAEN bit in the GPTMDMAEV register, respectively.
DescriptionValue
Capture event interrupt is disabled.0
Capture event is enabled.1
This bit is only valid in PWM mode.
0RWTBPWMIE9
December 13, 20131130
Texas Instruments-Advance Information
General-Purpose Timers