Datasheet

Figure 16-3. 16-Bit Input Edge-Time Mode Example
GPTMTnR=Y
Input Signal
Time
Count
GPTMTnR=X GPTMTnR=Z
Z
X
Y
0xFFFF
Note: When operating in Edge-time mode, the counter uses a modulo 2
24
count if prescaler is
enabled or 2
16
, if not. If there is a possibility the edge could take longer than the count, then
another timer configured in periodic-timer mode can be implemented to ensure detection
of the missed edge. The periodic timer should be configured in such a way that:
■ The periodic timer cycles at the same rate as the edge-time timer
■ The periodic timer interrupt has a higher interrupt priority than the edge-time timeout
interrupt.
■ If the periodic timer interrupt service routine is entered, software must check if an
edge-time interrupt is pending and if it is, the value of the counter must be subtracted
by 1 before being used to calculate the snapshot time of the event.
16.3.3.5 PWM Mode
The GPTM supports a simple PWM generation mode. In PWM mode, the timer is configured as a
24-bit down-counter with a start value (and thus period) defined by the GPTMTnILR and GPTMTnPR
registers. In this mode, the PWM frequency and period are synchronous events and therefore
guaranteed to be glitch free. PWM mode is enabled with the GPTMTnMR register by setting the
TnAMS bit to 0x1, the TnCMR bit to 0x0, and the TnMR field to 0x2. Table 16-9 on page 1113 shows
the values that are loaded into the timer registers when the timer is enabled.
Table 16-9. Counter Values When the Timer is Enabled in PWM Mode
Count Up ModeCount Down ModeRegister
Not availableGPTMTnILRGPTMTnR
Not availableGPTMTnILRGPTMTnV
When software writes the TnEN bit in the GPTMCTL register, the counter begins counting down
until it reaches the 0x0 state. Alternatively, if the TnWOT bit is set in the GPTMTnMR register, once
the TnEN bit is set, the timer waits for a trigger to begin counting (see “Wait-for-Trigger
1113December 13, 2013
Texas Instruments-Advance Information
Tiva
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TM4C129XNCZAD Microcontroller