Datasheet

24.2 Signal Description ..................................................................................................... 1586
24.3 Functional Description ............................................................................................... 1588
24.3.1 Ethernet Clock Control ............................................................................................... 1588
24.3.2 MII/RMII Interface Signals .......................................................................................... 1591
24.3.3 DMA Controller ......................................................................................................... 1592
24.3.4 Descriptors ............................................................................................................... 1605
24.3.5 TX/RX Controller ....................................................................................................... 1624
24.3.6 MAC Operation ......................................................................................................... 1628
24.3.7 IEEE 1588 and Advanced Timestamp Function ........................................................... 1631
24.3.8 Frame Filtering .......................................................................................................... 1639
24.3.9 Source Address, VLAN, and CRC Insertion, Replacement or Deletion .......................... 1640
24.3.10 Checksum Offload Engine .......................................................................................... 1642
24.3.11 MAC Management Counters ...................................................................................... 1643
24.3.12 Power Management Module ....................................................................................... 1643
24.3.13 Serial Management Interface ..................................................................................... 1646
24.3.14 Reduced Media Independent Interface (RMII) ............................................................. 1647
24.3.15 Interrupt Configuration ............................................................................................... 1647
24.4 EMAC Initialization and Configuration ......................................................................... 1647
24.5 Ethernet PHY ............................................................................................................ 1648
24.5.1 Integrated PHY Block Diagram ................................................................................... 1649
24.5.2 Functional Description ............................................................................................... 1649
24.5.3 Initialization and Configuration .................................................................................... 1655
24.6 Register Map ............................................................................................................ 1657
24.7 Ethernet MAC Register Descriptions ........................................................................... 1661
24.8 Ethernet PHY Register Descriptions ........................................................................... 1783
25 Universal Serial Bus (USB) Controller ............................................................. 1838
25.1 Block Diagram ........................................................................................................... 1839
25.2 Signal Description ..................................................................................................... 1839
25.3 Register Map ............................................................................................................ 1840
26 LCD Controller .................................................................................................... 1847
26.1 Block Diagram ........................................................................................................... 1847
26.2 Signal Description ..................................................................................................... 1848
26.3 Functional Description ............................................................................................... 1850
26.3.1 LCD DMA Engine ...................................................................................................... 1850
26.3.2 LIDD Bus Operation .................................................................................................. 1852
26.3.3 Raster Control ........................................................................................................... 1853
26.3.4 Clocking ................................................................................................................... 1856
26.3.5 LCD Frame Buffer ..................................................................................................... 1857
26.3.6 Palette ...................................................................................................................... 1863
26.3.7 Gray-Scaler/Serializer - Passive (STN) Mode .............................................................. 1863
26.3.8 Gray-Scaler/Serializer - Active (TFT) Mode ................................................................. 1863
26.3.9 Color/Grayscale Intensities and Modulation Rates ....................................................... 1863
26.3.10 Summary of Color Depth ............................................................................................ 1864
26.3.11 Output Format ........................................................................................................... 1864
26.3.12 Subpicture Feature .................................................................................................... 1865
26.4 Interrupts .................................................................................................................. 1866
26.5 Bus Transaction Modes ............................................................................................. 1867
26.6 Initialization and Configuration .................................................................................... 1867
11December 13, 2013
Texas Instruments-Advance Information
Tiva
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TM4C129XNCZAD Microcontroller