Datasheet

Register 22: DES DMA Interrupt Clear (DES_DMAIC), offset 0x03C
The DES DMA Interrupt Clear register is used to clear the DES_DMARIS and DES_DMAMIS
registers by writing a 1 to the corresponding register bit.
Note: This registers always reads as zero.
DES DMA Interrupt Clear (DES_DMAIC)
Base 0x4403.0000
Offset 0x03C
Type W1C, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
CINDINDOUTreserved
W1CW1CW1CROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:3
Data Out DMA Done Interrupt Clear
Writing a 1 to this bit clears the DOUT bit in the DES_DMARIS and
DES_DMAMIS register.
0W1CDOUT2
Data In DMA Done Interrupt Clear
Writing a 1 to this bit clears the DIN bit in the DES_DMARIS and
DES_DMAMIS register.
0W1CDIN1
Context In DMA Done Raw Interrupt Status
Writing a 1 to this bit clears the CIN bit in the DES_DMARIS and
DES_DMAMIS register.
0W1CCIN0
December 13, 20131066
Texas Instruments-Advance Information
Data Encryption Standard Accelerator (DES)