Datasheet

Register 34: AES System Configuration (AES_SYSCONFIG), offset 0x084
This register controls the IDLE and reset logic.
Note: After one operation has completed, the AES_SYSCONFIG register must be cleared and
re-configured for the next operation to ensure proper DMA and data operation functionality.
AES System Configuration (AES_SYSCONFIG)
Base 0x4403.6000
Offset 0x084
Type RW, reset 0x0000.0001
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
reserved
SOFTRESET
reserved
DMA_REQ_DATA_IN_EN
DMA_REQ_DATA_OUT_EN
DMA_REQ_CONTEXT_IN_EN
DMA_REQ_CONTEXT_OUT_EN
MAP_CONTEXT_OUT_ON_DATA_OUT
reservedKEYENCK3reserved
RORWRORORORWRWRWRWRWRORWRWROROROType
1000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:13
K3 Select
DescriptionValue
A regular cryptographic operation is performed.0
The K3 key is used as the key for the selected cryptographic
operation. The key size should be 128-bits.
This bit may only be set to one if the KEYENC bit of this register
is cleared to zero.
1
0RWK312
Key Encoding
DescriptionValue
A regular cryptographic operation is performed0
The KEK key (see KEKMODE bit) is XOR-ed with a predefined
constant value before it is used as a key for the selected
cryptographic operation.
1
0RWKEYENC11
1023December 13, 2013
Texas Instruments-Advance Information
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TM4C129XNCZAD Microcontroller