Datasheet

AES Crypto Data Length n (AES_C_LENGTH_n) registers (LSW and MSW) store the cryptographic

data length in bytes for all modes. The AES_C_LENGTH_0 register stores the most significant word

and the AES_C_LENGTH_1 register stores the least significant word. Once processing with this

context is started, this length decrements to zero. Data lengths up to (2

- 1) bytes are allowed. For

GCM, any value up to 236 - 32 bytes can be used. This is because a 32-bit counter mode is used;

the maximum number of 128-bit blocks is 2

- 2, resulting in a maximum number of bytes of 2

32. A write to this register triggers the engine to start using this context. This is valid for all modes

except GCM and CCM. Note that for the combined modes, this length does not include the

authentication only data; the authentication length is specified in the AES_AUTH_LENGTH register

below. All modes must have a length greater than 0. For the combined modes, it is permissible to

have one of the lengths equal to zero. For the basic encryption modes (ECB/CBC/CTR/ICM/CFB128)

it is permissible to program zero to the length field; in that case the length is assumed infinite. All

data must be byte (8-bit) aligned; bit aligned data streams are not supported by the AES Engine.

Note: For a Host read operation, these registers return all zeroes.

AES Crypto Data Length (AES_C_LENGTH_n)

Base 0x4403.6000

Offset 0x054

Type RW, reset 0x0000.0000

16171819202122232425262728293031

LENGTH

RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType

0000000000000000Reset

0123456789101112131415

LENGTH

RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType

0000000000000000Reset

DescriptionResetTypeNameBit/Field

Data Length

This field stores the cryptographic data length in bytes for all modes.

0x00000000RWLENGTH31:0

December 13, 20131018

Texas Instruments-Advance Information

Advance Encryption Standard Accelerator (AES)