Datasheet

Register 17: AES Initialization Vector Input 0 (AES_IV_IN_0), offset 0x040
Register 18: AES Initialization Vector Input 1 (AES_IV_IN_1), offset 0x044
Register 19: AES Initialization Vector Input 2 (AES_IV_IN_2), offset 0x048
Register 20: AES Initialization Vector Input 3 (AES_IV_IN_3), offset 0x04C
This register contains the initialization vector input.
AES Initialization Vector Input (AES_IV_IN_n)
Base 0x4403.6000
Offset 0x040
Type RW, reset 0x0000.0000
16171819202122232425262728293031
DATA
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
0000000000000000Reset
0123456789101112131415
DATA
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Initialization Vector Input
This field contains the initialization input vector. The least significant
word (LSW) is represented in register AES_IV_IN_0 and the most
significant word is stored in AES_IV_IN_3
0x0000.0000RWDATA31:0
December 13, 20131012
Texas Instruments-Advance Information
Advance Encryption Standard Accelerator (AES)