Datasheet

DIT4096
17
SBOS225A
www.ti.com
CHANNEL STATUS BUFFER TRANSFER INTERRUPT
This interrupt occurs when a channel status buffer transfer
has been completed. This interrupt may be used by the host
to trigger an event to occur after a channel status buffer
update. The BTI bit in status register 04
H
is used to indicate
the occurrence of the buffer transfer. The BTI bit, like all other
status bits, is active high and remains set until the status
register is read.
DATA SLIP AND BLOCK START INTERRUPTS
Unlike the BTI interrupt, which has only one function, the TSLIP
interrupt can be set to one of two modes. This is accomplished
using the BSSL bit in control register 05
H
. When BSSL = 0, the
TSLIP interrupt is set to indicate a data slip condition. When
BSSL = 1, the TSLIP interrupt is set to indicate a block start
condition. The TSLIP bit, like all other status bits, is active high
and remains set until the status register is read.
A data slip condition may occur in cases where the master clock,
MCLK (pin 6), is asynchronous to the audio data source. When
BSSL = 0, the TSLIP bit will be set to 1 every time a data sample
is dropped or repeated.
FIGURE 10. Typical Circuit Configuration, Software Mode.
TX+
TX–
V
IO
DGND
V
DD
DGND
18
17
7
8
19
16
RXP
SCLK
SYNC
SDATA
CS
CCLK
CDIN
CDOUT
INT
BLS
U
RST
MCLK
MODE
9
11
12
13
5
3
4
2
22
25
27
15
6
28
DIT4096
Digital Audio
Source
(A/D Converter,
DSP)
From AES-3
Encoded Data
Source
(Optional)
µP or DSP
Audio Master
Clock
C
1
C
2
+2.7V to V
DD
+5V
C
1
= C
2
= 0.1µF to 1µF
Cable or
Fiber Optics
Output
Circuit
(See Figs. 12-14)
V
IO
10kΩ
A block start condition occurs when a block start signal is
generated either internally by the DIT4096, or when an
external block start is received at the BLS input (pin 25).
APPLICATIONS INFORMATION
This section provides practical information pertinent for
designing the DIT4096 into a target application. Circuit
schematics are provided as needed.
TYPICAL APPLICATION DIAGRAMS
Figures 10 and 11 illustrate the typical application schemat-
ics for the DIT4096 when used in Software and Hardware
modes. Figure 10 shows a typical Software mode applica-
tion, where a microprocessor or DSP interface is used to
communicate with the DIT4096 via the serial control port.
See Figure 11 for a typical Hardware mode configuration,
where the control pins are either hardwired or driven by
digital logic in a stand-alone application.
The recommended component values for power-supply
bypass capacitors are shown in Figures 10 and 11. These
capacitors should be located as close to the DIT4096
power-supply pins as physically possible.