Datasheet

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TYPICAL CIRCUIT CONNECTION
R
2
AUDIO
Receiver Circuit
C
5
3.3-V V
DD
+
C
7
+
C
8
C
6
For Automatic Clock Source Selection
Reset (active LOW )
11
12
10
9
8
7
6
5
4
3
2
COUT
DOUT
UOUT
EMPH
BFRAME
RST
RSV
RXIN
CKSEL
FILT
DGND
PSCK1
PSCK0
FSOUT0
BCKO
LRCKO
CLKST
SCKO
FSOUT1
ERROR
1
15
16
17
18
19
20
21
22
23
24
13
14
XTI
XTO
AGND
FMT1
FMT0
25
26
27
28
To Microcontroller
R
1
C
4
Actual Sampling
Frequency Output
X
1
C
3
System Clock
FrequencySetting
384, 512f
(128, 256,
S
)
Audio Data
Processor
DecodedData Format
Setting
3.3-V V
CC
C
1
C
2
V
DD
V
CC
DIR9001
SLES198 – DECEMBER 2006
Figure 17 illustrates typical circuit connection.
NOTES: R
1
: Loop filter resistor, 680 Ω
R
2
: Current-limiting resistor; generally, a 100 Ω –500 Ω resistor is used, but it depends on the crystal resonator.
C
1
: Loop filter capacitor, 0.068 µ F.
C
2
: Loop filter capacitor, 0.0047 µ F.
C
3
, C
4
: OSC load capacitor; generally, a 10-pF–30-pF capacitor is used, but it depends on the crystal resonator and
PCB layout.
C
5
, C
8
: 10- µ F electrolytic capacitor typical, depending on power-supply quality and PCB layout.
C
6
, C
7
: 0.1- µ F ceramic capacitor typical, depending on power-supply quality and PCB layout.
X
1
: Crystal resonator, use a 24.576-MHz fundamental resonator when XTI clock source is needed.
Figure 17. Typical Circuit Connection Diagram
25
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