Datasheet

www.ti.com
Clock and Data Recovery
SCKO
BCKO
LRCKO
DOUT
RXIN
Divider
FILT
XTO
XTI
FSOUT0
FSOUT1
OSC
CLKST
VCO
CKSEL
DGND
ERROR
PLL
Divider
Decoder
Preamble
Detector
Charge
Pump
Clock
Decoder
Biphase
Data Decoder
Serial
AudioData
Formatter
ERROR
Detector
AudioData
MUTE Control
Sampling
Frequency
Calculator
Clock Transition Signal Out
DIR9001
SLES198 – DECEMBER 2006
Figure 5. Clock Source, Source Selector, and Data Path
The DIR9001 provides an output pulse that is synchronized with the PLL’s LOCK/UNLOCK status change.
The CLKST pin outputs the PLL status change between LOCK and UNLOCK. The CLKST output pulse depends
only on the status change of the PLL.
This clock change/transition signal is output through CLKST.
As this signal indicates a clock transition period due to a PLL status change, it can be used for muting or other
appropriate functions in an application.
A clock source selection caused by the CLKSEL pin does not affect the output of CLKST.
CLKST does change due to PLL status change even if CKSEL = H in the XTI source mode.
When DIR9001 is reset in the state where it is locked to the biphase input signal, the pulse signal of CLKST is
not output. That is, the priority of reset is higher than CLKST.
The relation among the lock-in/unlock process, the CLKST and ERROR outputs, the output clocks (SCKO,
BCKO, LRCKO), and data (DOUT) is shown in Figure 6 .
11
Submit Documentation Feedback