Datasheet

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2 Circuit
1
2
3
4
5
6
7
14
13
12
11
10
9
8
+V
CC
NC
I-
GND
V
OUT
V
REF
-V
CC
+V
CC
V
G
+V
IN
+R
G
-R
G
-V
IN
-V
CC
R
1
R
3
R
2
R
7
InP
InN
R
6
V
G
R
5
R
4
V
OUT
+V
S
-V
S
C
4
+V
S
+V
S
-V
S
-V
S
C
1
L
1
TB1
L
2
C
2
G
1
G
2
A
B
C
3
(X2Y Capacitor)
®
3 Components
Circuit
The circuit schematic illustrated in Figure 2 shows the connections for all possible components.
Figure 2. Schematic
Components that have RF performance similar to those listed in Table 1 may be substituted.
Table 1. Component Descriptions
PART DESCRIPTION
L
1
, L
2
EMI-Suppression Ferrite Chip, SMD 0805
C
1
, C
2
Tantalum Chip Capacitor, SMD EIA Size 3216, 20V
C
3
X2Y
®
capacitor, Yageo X0603MRX7R6BB104)
C
4
Multi-Layer Ceramic Chip Capacitor, SMD 0603, 50V
InP, InN, V
G
, V
OUT
SMA or SMB Board Jack (Amphenol 901-144-8)
TB Terminal Block, 3.5mm Centers (On-Shore Technology ED555/3DS)
R
1
– R
4
, R
6
, R
7
Metal Film Chip Resistor, SMD 0402, 1/8W
R
5
Metal Film Chip Resistor, SMD 0603, 1/8W
R
1
, R
2
, R
5
and R
6
set the I/O impedance for the signal chain and the control pin. R
3
and R
4
set the gain
for the device; R
7
and C
4
are connected to the reference voltage pin. 10 Ω to 20 Ω is recommended on this
pin at all time. To limit the noise contribution of this resistor, a 0.1 µ F capacitor in parallel with R
7
is
recommended. C
1
, C
2
and C
3
are supply bypass capacitors.
DEM-VCA-SO-1B Demonstration Fixture2 SBOU050 – April 2007
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