Datasheet

R x
S1
R x
OUT
OutX
J x
OUT
InX
J x
IN
R x
B
R x
F
C
N
C x
DIS
C
P
+V
S
R x
S2
R x
G
R x
B2
GND
-
S
V
+V
S
C V
BYP SP
C
PN
+V
S
L
P
L
N
TB
1
-V
S
C V
BYP SN
R x
DIS
DISX
-
S
V
Circuit www.ti.com
2 Circuit
The circuit schematic in Figure 2 shows the connections for all possible components. Each configuration
uses only some of the components.
Figure 2. Schematic for DEM-OPA-SO-3B
3 Components
Components that have RF performance similar to the ones listed in Table 1 may be substituted. C
BYP
V
SP
and C
BYP
V
SN
need a larger voltage rating for ±15V dual supplies.
Table 1. Component Descriptions
PART DESCRIPTION
C
BYP
V
SP
,
Tantalum Chip Capacitor, SMD EIA Size 3528, 20V
C
BYP
V
SN
C
N
, C
P
, C
PN
Multilayer Ceramic Chip Capacitor, SMD 1206, 50V
J
IN
x, J
OUT
x SMA or SMB Board Jack (Amphenol 901-144-8)
EMI-Suppression Ferrite Chip, SMD 1206
L
P
, L
N
(Steward LI 1206 B 900 R)
Terminal Block, 3.5mm Centers
TB
1
(On-Shore Technology ED555/3DS)
Rxxx Metal Film Chip Resistor, SMD 1206, 1/8W
R
B
x, R
OUT
x, and R
B2
x set the I/O impedance, R
F
x and R
G
x set the gain, and C
BYP
V
SN
, C
BYP
V
SP
, C
N
, C
P
, and
C
PN
are supply bypass capacitors. C
PN
is optional; it adds a bypass between the supplies that improves
distortion performance for some models. L
P
and L
N
are ferrite chips that can reduce interactions with the
power supply at high frequencies. If not desired, they can be replaced with 0Ω resistors.
For single-supply operation, do not connect L
N
; otherwise, the –V
S
input to TB
1
would be at ground
potential.
2
DEM-OPA-SO-3B Demonstration Fixture SBOU018B–November 2002–Revised September 2010
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