Datasheet

4 Board Layout
(b)Bottomlayer(negativeimageshownforclarity)
V
IN1
V
OUT
V
IN2
J1
J2
J3
SEL
J5
J4
U1
P1
C1C2
EN
R1
C4
R5
R4
R3
C3
2.000in(5,080cm)
(a)Toplayer
DEM-OPA-SO-1D
Rev.B-01/09
PR1454
R2
1.610in(4,089cm)
www.ti.com Board Layout
This demonstration board is a two-layer PCB; see Figure 3 . It has separate ground and power planes in
the inner layers. The ground plane has been opened up around op amp pins sensitive to capacitive
loading. Power-supply planes are laid out to keep current-loop areas to a minimum. J1, J2 and J4 to be
mounted horizontally onto the board edge. J3, and J4 are to be mounted vertically onto the board. The
location and type of capacitors used for power-supply bypassing are crucial to high-frequency amplifiers.
The tantalum capacitors, C
3
and C
4
, do not need to be as close to pins 1 and 5 on the PCB and may be
shared with other amplifiers. See the individual amplifier data sheets for more information on proper board
layout techniques and component selection.
Figure 3. DEM-OPA-SO-1D Demonstration Fixture Layout
SBOU049A – April 2007 – Revised April 2009 DEM-OPA-SO-1D Demonstration Fixture 3
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