Datasheet
®
DDC101
24
FIGURE 24. Example of Basic DDC101 Circuit Connections.
Reading Data Output
Data from the previous conversion can be read any time after
the DATA VALID output is activated and before the end of
the next conversion. Data is held in an internal serial shift
register until the end of the next conversion. The data must
be completely read before the end of the next conversion or
it will be overwritten with new data.
Recommended Setup
The following Setup parameters are recommended, in gen-
eral, for use with the DDC101 with integration times of 1ms
or longer. Multiple integrations per conversion, where prac-
tical, will provide lowest noise as illustrated in the typical
performance curves.
Measurement Time Calculation
The time between “Final Data point Start” commands is the
Integration Time, T
INT
. The Measurement Time, T
MEAS
, is the
Integration time reduced by the Acquisition Time and by the
Oversampling Time, T
OS
.
T
MEAS
= T
INT
- T
ACQ
- T
OS
.
When CDS is used; T
OS
, the oversampling time, is the time
required to collect a data point (M clock periods). Each
group of samples is averaged with the result at the midpoint
of each sample group. Therefore, with CDS, T
OS
= M clock
periods. This is shown in Figure 25.
Two calculations of the Measurement Time are shown
A Continuous Integration Cycle consists of the Acquisition
Time, Initial Data Point Collection, Tracking Interval, and
Final Data Point Collection. The user can select these
functions as illustrated in Table XV.
FUNCTION RECOMMENDED
Acquisition Clocks, K 16
Oversamples, M 128
CDS Enabled
USER
FUNCTION CLOCK CYCLES CONTROLLED
Acquisition Time, K 1, 16, 32 Yes
Initial Data Point
Samples, M
(1)
1, 2, 4, 8, 16, 32,64, 128, 256 Yes
Tracking Interval Variable Yes
Final Data Point
Samples, M
(1)
1, 2, 4, 8, 16, 32, 64, 128, 256 Yes
NOTE: (1) Will be the same in CDS mode, initial Data Point Samples = 0 in non-
CDS mode.
TABLE XV. Components of Integration Cycle.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
24-Lead SOIC
Top view
+5VDC
0.1µF
0.1µF
0.1µF
–5VDC
10µF
10µF
Analog Input
10µF
V
REF
Analog Common
Digital Common
Guard
DIGITAL GROUND
V
S
–
1kΩ
25kΩ
10µF
–2.5V
REF1004 –2.5
10Ω
Reference
Bias
Resistor
Reference
Noise Filter
Reference Buffer Bypass
V
S
– , ANALOG
ANALOG COMMON
ANALOG INPUT
ANALOG COMMON
V
S
+, ANALOG
V
S
+, ANALOG
V
DD
+, DIGITAL