Datasheet

TIMING DIAGRAMS
CS
Case1: StandaloneoperationwithoutSDO, tiedlow.LDAC
Case2: StandaloneoperationwithoutSDO, active.LDAC
SCLK
SDI
LDAC
t
9
t
8
t
4
t
5
t
6
t
3
t
1
t
2
t
7
InputRegister
andDACLatch
Updated
Low
Bit23(N) Bit22(N) Bit1(N) Bit0(N)
CS
SCLK
SDI
LDAC
t
9
t
8
t
4
t
5
t
6
t
3
t
1
t
2
t
7
InputRegister
Updated
High
=Don’tCare
Bit23=MSB
Bit0=LSB
Bit23(N) Bit22(N) Bit1(N) Bit0(N)
DACLatch
Updated
t
14
t
15
DAC9881
SBAS438A – MAY 2008 – REVISED AUGUST 2008 ......................................................................................................................................................... www.ti.com
Figure 1. Timing Diagram for Standalone Operation without SDO
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