Datasheet

DAC900
3
SBAS093B
ELECTRICAL CHARACTERISTICS (Cont.)
At T
A
= +25°C, +V
A
= +5V, +V
D
= +5V, differential transformer coupled output, 50Ω doubly terminated, unless otherwise specified.
DAC900U/E
PARAMETER CONDITIONS MIN TYP MAX UNITS
DYNAMIC PERFORMANCE (Cont.)
Output Rise Time
(2)
10% to 90% 2 ns
Output Fall Time
(2)
10% to 90% 2 ns
Glitch Impulse 3pV-s
DC-ACCURACY
Full-Scale Output Range
(3)
(FSR) All Bits High, I
OUT
2.0 20.0 mA
Output Compliance Range –1.0 +1.25 V
Gain Error With Internal Reference –10 ±1 +10 %FSR
Gain Error With External Reference –10 ±2 +10 %FSR
Gain Drift With Internal Reference ±120 ppmFSR/°C
Offset Error With Internal Reference –0.025 +0.025 %FSR
Offset Drift With Internal Reference ±0.1 ppmFSR/°C
Power-Supply Rejection, +V
A
–0.2 +0.2 %FSR/V
Power-Supply Rejection, +V
D
–0.025 +0.025 %FSR/V
Output Noise I
OUT
= 20mA, R
LOAD
= 50Ω 50 pA/√Hz
Output Resistance 200 kΩ
Output Capacitance I
OUT
, I
OUT
to Ground 12 pF
REFERENCE
Reference Voltage +1.24 V
Reference Tolerance ±10 %
Reference Voltage Drift ±50 ppmFSR/°C
Reference Output Current 10 µA
Reference Input Resistance 1MΩ
Reference Input Compliance Range 0.1 1.25 V
Reference Small-Signal Bandwidth
(4)
1.3 MHz
DIGITAL INPUTS
Logic Coding Straight Binary
Latch Command Rising Edge of Clock
Logic High Voltage, V
IH
+V
D
= +5V 3.5 5 V
Logic Low Voltage, V
IL
+V
D
= +5V 0 1.2 V
Logic High Voltage, V
IH
+V
D
= +3V 2 3 V
Logic Low Voltage, V
IL
+V
D
= +3V 0 0.8 V
Logic High Current
,
I
IH
(5)
+V
D
= +5V ±20 µA
Logic Low Current, I
IL
+V
D
= +5V ±20 µA
Input Capacitance 5pF
POWER SUPPLY
Supply Voltages
+V
A
+2.7 +5 +5.5 V
+V
D
+2.7 +5 +5.5 V
Supply Current
(6)
I
VA
24 30 mA
I
VA
, Power-Down Mode 1.1 2 mA
I
VD
815mA
Power Dissipation +5V, I
OUT
= 20mA 170 230 mW
+3V, I
OUT
= 2mA 50 mW
Power Dissipation, Power-Down Mode 45 mW
Thermal Resistance,
θ
JA
SO-28 75 °C/W
TSSOP-28 50 °C/W
NOTES: (1) At output I
OUT
, while driving a virtual ground. (2) Measured single-ended into 50Ω Load. (3) Nominal full-scale output current is 32x I
REF
; see Application
Section for details. (4) Reference bandwidth depends on size of external capacitor at the BW pin and signal level. (5) Typically 45µA for the PD pin, which has an
internal pull-down resistor. (6) Measured at f
CLOCK
= 50MSPS and f
OUT
= 1.0MHz.