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9.4 DAC Output Update Options
The DXP software also allows the user to choose several DAC output update options, as Figure 13
shows.
Figure 13. DAC Output Update Options
Table 6 lists the details on these options.
Table 6. Output Update Features
Options Detailed Description
Frame Sync The DXP software defaults to Frame Sync. The Frame Sync output of the MMB0
connects to the SYNC input of the DAC88811. The DAC output changes to the
corresponding level when the DAC latch is updated via SDI. Ensure the shunt jumper
on W6 is covering pins 2-3 (default is 1-2) to use this feature.
Latch with DSP Timer N/A
Latch with External Timer N/A
Update Rate User input; enter the desired DAC update rate. 1MSPS is the default
10 Bill of Materials
Table 7. Parts Lists
Item # Qty Designator Manufacturer Part Number Description
1 3 C8 C9 C10 TDK C3216COG2A103KT 0.01µF, 1206 Multilayer ceramic capacitor
C1 C2 C5 C7
2 6 TDK C3216COG1E104KT 0.1µF, 1206 Multilayer ceramic capacitor
C11 C13
3 1 C12 TDK C3216COG2A102KT 1 nF, 1206 Multilayer ceramic capacitor
4 2 C4 C6 TDK C3225X7R1E106KT 10 µF, 1210 Multilayer ceramic X5R capacitor
5 1 C3 TDK C3216X7R1E471KT 470 pF, 50V, 1206 Multilayer ceramic capacitor SMD
6 4 R1 R2 R3 R5
(1)
Panasonic ERJ-8GEY0R00V 0 Ω, 1/4W 1206 chip resistor
7 1 R10 Panasonic ERJ-8ENF2002V 20 kΩ, 1/4W 1206 chip resistor
8 1 R4 Panasonic ERJ-8GEYJ101V 100 Ω, 1/4W 1206 chip resistor
9 1 R8 Panasonic ERJ-8GEYJ202V 2 kΩ, 5%, 1/4W 1206 chip resistor
10 2 R6 R12 Panasonic ERJ-8ENF1002V 10 kΩ, 1/4W 1206 chip resistor
11 1 R9 Bourns 3214W-1-203E 20K Potentiometer
12 1 J5 Molex 122-03-2041 4 Position jumper_0.1" spacing
13 1 J6 Samtec TSM-105-01-T-DV 5×2×0.1 10-pin 3A isolated power socket
14 2 J2 J4 Samtec TSM-110-01-S-DV-M 10×2×0.1, 20 Pin 0.025"sq SMT socket
15 2 J1 J3
(1)
On-Shore Technology ED555/3DS 3-Pin terminal connector
16 1 U1
(2)
Texas Instruments DAC8801E/DAC8811E 14-bit/16-bit, Current output, serial input MDAC
17 1 U2 Texas Instruments REF102AU 8-SOIC(D) precision reference, +10V
TP1 TP4 TP5
18 5 Mill-max 2348-2-01-00-00-07-0 Turret terminal test point
TP6 TP7
19 2 P2 P4
(3)
Samtec SSW-110-22-S-D-VS-P 20-PIN 0.025"sq SMT terminal strips
(1)
The following parts: J1, J3, R1, R2, and R3 are not installed.
(2)
The device installed is specific to the EVM ordered.
(3)
P2, P4, and P6 parts are not shown in the schematic diagram. All the P designated parts are installed in the bottom side of the
PCB opposite the J designated counterpart. Example, J2 is installed on the topside while P2 is installed in the bottom side
opposite of J2.
17
SLAU151A–January 2005–Revised November 2009 DAC8801/11EVM
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