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APPLICATION INFORMATION
Stability Circuit
_
+
V
DD
R
FB
I
OUT
GND
U1
V
DD
V
REF
V
OUT
C1
U2
V
REF
Positive Voltage Output Circuit
GND
OPA277
−2.5 V
GND
0 3 V
OUT
3 +2.5 V
V
OUT
I
OUT
OPA277
C1
R
FB
DAC8801
V
DD
V
DD
+2.5V Reference
V
IN
V
OUT
V
REF
−
+
−
+
DAC8801
SLAS403B – NOVEMBER 2004 – REVISED FEBRUARY 2007
For a current-to-voltage design as shown in Figure 20 , the DAC8801 current output (I
OUT
) and the connection
with the inverting node of the op amp should be as short as possible and according to correct PCB layout
design. For each code change there is a step function. If the GBP of the op amp is limited and parasitic
capacitance is excessive at the inverting node then gain peaking is possible. Therefore, for circuit stability, a
compensation capacitor C1 (4 pF to 20 pF typ) can be added to the design as shown in Figure 20 .
Figure 20. Gain Peaking Prevention Circuit With Compensation Capacitor
As shown in Figure 21 , in order to generate a positive voltage output, a negative reference is input to the
DAC8801. This design is suggested instead of using an inverting amp to invert the output due to tolerance
errors of the resistor. For a negative reference, V
OUT
and GND of the reference are level-shifted to a virtual
ground and a -2.5 V input to the DAC8801 with an op amp.
Figure 21. Positive Voltage Output Circuit
10
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