Datasheet

DAC8728
www.ti.com SBAS466A –JUNE 2009–REVISED NOVEMBER 2009
ELECTRICAL CHARACTERISTICS: Dual-Supply
All specifications at T
A
= T
MIN
to T
MAX
, AV
DD
= +16.5V, AV
SS
= –16.5V, DV
DD
= +5V, REF-A and REF-B = +5V, gain = 6,
AGND-x = DGND = 0V, and Offset DAC A and Offset DAC B are at default values
(1)
, unless otherwise noted.
DAC8728
PARAMETER CONDITIONS MIN TYP MAX UNIT
STATIC PERFORMANCE
Resolution 16 Bits
Linearity error Measured by line passing through codes 0000h and FFFFh ±4 LSB
Differential linearity error Measured by line passing through codes 0000h and FFFFh ±1 LSB
T
A
= +25°C, before user calibration, gain = 6, code = 8000h ±10 LSB
Bipolar zero error T
A
= +25°C, before user calibration, gain = 4, code = 8000h ±15 LSB
T
A
= +25°C, after user calib., gain = 4 or 6, code = 8000h ±1 LSB
Bipolar zero error TC Gain = 4 or 6, code = 8000h ±0.5 ±2 ppm FSR/°C
T
A
= +25°C, gain = 6, code = 0000h ±10 LSB
Zero-code error
T
A
= +25°C, gain = 4, code = 0000h ±15 LSB
Zero-code error TC Gain = 4 or 6, code = 0000h ±0.5 ±3 ppm FSR/°C
T
A
= +25°C, gain = 6 ±10 LSB
Gain error
T
A
= +25°C, gain = 4 ±15 LSB
Gain error TC Gain = 4 or 6 ±1 ±3 ppm FSR/°C
T
A
= +25°C, before user calibration, gain = 6, code = FFFFh ±10 LSB
Full-scale error T
A
= +25°C, before user calibration, gain = 4, code = FFFFh ±15 LSB
T
A
= +25°C, after user calib., gain = 4 or 6, code = FFFFh ±1 LSB
Full-scale error TC Gain = 4 or 6, code = FFFFh ±0.5 ±3 ppm FSR/°C
Measured channel at code = 8000h, full-scale change on any
DC crosstalk
(2)
0.2 LSB
other channel
(1) Offset DAC A and Offset DAC B are trimmed in manufacturing to minimize the error for symmetrical output. The default value may vary
no more than ±10 LSB from the nominal number listed in Table 8. These pins are not intended to drive an external load, and must not
be connected during dual-supply operation.
(2) The DAC outputs are buffered by op amps that share common AV
DD
and AV
SS
power supplies. DC crosstalk indicates how much dc
change in one or more channel outputs may occur when the dc load current changes in one channel (because of an update). With
high-impedance loads, the effect is virtually immeasurable. Multiple AV
DD
and AV
SS
terminals are provided to minimize dc crosstalk.
Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): DAC8728