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ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) TSSOP 16

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C Read-back Examples (A0, A1, A2, A3 and LDAC pins tied to GND):

DAC8574

SLAS377B – JANUARY 2003 – REVISED DECEMBER 2004

EXAMPLE 14: Broadcast update command. All channels of all DAC8574s update with previously stored temporary register data.

ADDRESS [7...0] C [7...0] M [7...0] L [7...0]

START 1001 0000 ACK 0011 0000 ACK XXXX XXXX ACK XXXX XXXX ACK STOP

Previous DAC output voltages are valid for all channels, all DAC8574s New data is valid

EXAMPLE 15: Broadcast Data. All channels of all DAC8574s get set to code 7.

ADDRESS [7...0] C [7...0] M [7...0] L [7...0]

0011

START 1001 0000 ACK ACK 0000 0000 ACK 0000 0111 ACK STOP

0000

All Vouts = 7 x 76

Previous DAC output voltages are valid for all channels, all DAC8574s

µV

EXAMPLE 16: Broadcast Power-Down. All channels of all DAC8574s get powered down with output impedance of 1 k Ω to ground.

ADDRESS [7...0] C [7...0] M [7...0] L [7...0]

START 1001 0000 ACK 0011 0001 ACK 0100 0000 ACK 0000 0000 ACK STOP

Previous DAC output voltages are valid for all channels, all DAC8574s All Vouts = GND

EXAMPLE 17: Read back channel A power-down bits and 16-bit channel A data. V denotes valid logic.

ADDRESS [7...0] C [7...0] REPEATED ADDRESS

START 1001 1000 ACK 0001 0001 ACK START 1001 1001 ACK

PWD [7...0] MASTER MSB [7...0] MASTER LSB [7...0] MASTER

VV11 1111 ACK VVVV VVVV ACK VVVV VVVV NOT ACK

EXAMPLE 18: Read back channel B power-down bits and 16-bit channel B data. V denotes valid logic.

ADDRESS [7...0] C [7...0] REPEATED ADDRESS

START 1001 1000 ACK 0001 0011 ACK START 1001 1001 ACK

PWD [7...0] MASTER MSB [7...0] MASTER LSB [7...0] MASTER

VV11 1111 ACK VVVV VVVV ACK VVVV VVVV NOT ACK

EXAMPLE 19: Read back channel C power-down bits and 16-bit channel C data. V denotes valid logic.

ADDRESS [7...0] C [7...0] REPEATED ADDRESS

START 1001 1000 ACK 0001 0101 ACK START 1001 1001 ACK

PWD [7...0] MASTER MSB [7...0] MASTER LSB [7...0] MASTER

VV11 1111 ACK VVVV VVVV ACK VVVV VVVV NOT ACK

EXAMPLE 20: Read back channel D power-down bits and 16-bit channel D data. V denotes valid logic.

ADDRESS [7...0] C [7...0] REPEATED ADDRESS

START 1001 1000 ACK 0001 0111 ACK START 1001 1001 ACK

PWD [7...0] MASTER MSB [7...0] MASTER LSB [7...0] MASTER

VV11 1111 ACK VVVV VVVV ACK VVVV VVVV NOT ACK

EXAMPLE 21: Read back 16-bit channel D data only. V denotes valid logic.

ADDRESS [7...0] C [7...0] REPEATED ADDRESS

START 1001 1000 ACK 0001 0110 ACK START 1001 1001 ACK

MSB [7...0] MASTER LSB [7...0] MASTER

VVVV VVVV ACK VVVV VVVV NOT ACK

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