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Master Receiver Reading From a Slave Transmitter (DAC8574) in HS-Mode

DAC8574

SLAS377B – JANUARY 2003 – REVISED DECEMBER 2004

When reading data to the DAC8574 in HS-MODE, the master begins to transmit, what is called the HS-Master

Code (0000 1XXX) in F/S-mode. No device is allowed to acknowledge the HS-Master Code, so the HS-Master

Code is followed by a NOT acknowledge.

The Master then switches to HS-mode and issues a REPEATED START condition, followed by the address byte

(with R/ W = 0) after which the DAC8574 acknowledges by pulling SDA low. This address byte is usually followed

by the control byte, which is also acknowledged by the DAC8574.

Then there is a REPEATED START condition initiated by the master and the address is resent with (R/ W = 1).

This is acknowledged by the DAC8574, indicating that it is prepared to transmit data. Two or Three bytes of data

are then read back from the DAC8574, depending on the (PD0-Bit). The value of Buff-Sel1 and Buff-Sel0

determines, which channel data is read back. A STOP condition follows.

With the (PD0-Bit = 0) the DAC8574 transmits 2 bytes of data, HIGH-BYTE followed by LOW-BYTE (refer to

Table 7 HS-Mode Readback Sequence).

With the (PD0-Bit = 1) the DAC8574 transmits 3 bytes of data, POWER-DOWN-BYTE followed by the

HIGH-BYTE followed by the LOW-BYTE (refer to Table 7 HS-Mode Readback Sequence).

Table 7. Master Receiver Reading Slave Transmitter (DAC8574) in HS-Mode

HS MODE READBACK SEQUENCE

Transmitter MSB 6 5 4 3 2 1 LSB Comment

Master Start Begin sequence

Master 0 0 0 0 1 X X X HS Mode Master Code

No device may acknowledge HS

NONE Not Acknowledge

master code

Master Repeated Start

Master 1 0 0 1 1 A1 A0 R/ W Write addressing ( R/ W=0)

DAC8574 DAC8574 Acknowledges

Master A3 A2 Load 1 Load 0 X Buff Sel 1 Buff Sel 0 PD0 Control byte ( PD0 = 1)

DAC8574 DAC8574 Acknowledges

Master Repeated Start

Master 1 0 0 1 1 A1 A0 R/ W Read addressing ( R/ W=1)

DAC8574 DAC8574 Acknowledges

DAC8574 PD1 PD2 1 1 1 1 1 1 Power-down byte

Master Master Acknowledges

DAC8574 D15 D14 D13 D12 D11 D10 D9 D8 Reading data word, high byte

Master Master Acknowledges

DAC8574 D7 D6 D5 D4 D3 D2 D1 D0 Reading data word, low byte

Master Master Not Acknowledges Master signal end of read

Master Stop or Repeated Start Done