DAC8574 Evaluation Module User’s Guide June 2003 Data Acquisition - Digital/Analog Converters SLAU109
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EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input and output voltage ranges described in the EVM user’s guide. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
Information About Cautions and Warnings Preface Read This First About This Manual This user’s guide describes the characteristics, operation, and the use of the DAC8574 evaluation module. It covers all pertinent areas involved to properly use this EVM board along with the devices that it supports. The physical PCB layout, schematic diagram and circuit descriptions are included.
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Contents Contents 1 EVM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.1 Supply Voltage . . . . . . . . . . . . . . . . . . . . .
Contents Figures 1-1 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9 2 - 10 2 - 11 2 - 12 EVM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Top Silkscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Layer 1 (Top Signal Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 EVM Overview This chapter gives a general overview of the DAC8574 evaluation module (EVM), and describes some of the factors that must be considered in using this module. Topic Page 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 EVM Basic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features 1.1 Features This EVM features the DAC8574 digital-to-analog converter (DAC). The DAC8574 EVM is a simple evaluation module designed for a quick and easy way to evaluate the functionality and performance of the high resolution, quad-channel, and serial I2C input DAC. This EVM features a serial I2C interface to communicate with any host microprocessor or TI DSP base system. 1.2 Power Requirements The following sections describe the power requirements of this EVM. 1.2.
EVM Basic Functions 1.2.2 Reference Voltage The 5-V precision voltage reference is provided to supply the external voltage reference for the DAC through REF02, U3, via jumper W4 by shorting pins 1 and 2. The reference voltage goes through an adjustable 100 kΩ potentiometer, R11, in series with 20 kΩ, R10, to allow the user to adjust the reference voltage to its desired settings. The voltage reference is then buffered through U8A as seen by the device under test.
EVM Basic Functions A block diagram of the EVM is shown in Figure 1 - 1. Figure 1 - 1. EVM Block Diagram VCC VSS 3.
Chapter 2 PCB Design and Performance This chapter describes the layout design of the PCB, thereby, describing the physical and mechanical characteristics of the EVM. This section also shows the resulting performance of the EVM, which can be compared to the device specification listed in the data sheet. The list of components used on the module is also included in this section. Topic Page 2.1 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Layout 2.1 PCB Layout The DAC8574 EVM is designed to preserve the performance quality of the DAC, device under test, as specified in the data sheet. Carefully analyzing the EVM’s physical restrictions and the given or known elements that contributes to the EVM’s performance degradation is the key to a successful design implementation.
PCB Layout Figure 2 - 1. Top Silkscreen Figure 2 - 2. Layer 1 (Top Signal Plane) Figure 2 - 3.
PCB Layout Figure 2 - 4. Layer 3 (Power Plane) Figure 2 - 5. Layer 4 (Bottom Signal Plane) Figure 2 - 6.
PCB Layout Figure 2 - 7.
EVM Performance 2.2 EVM Performance The EVM performance test is performed using a high density DAC bench test board, an Agilent 3458A digital multimeter, and a PC running the LABVIEW software. The EVM board is tested for all codes of 65535 and the device under test (DUT) is allowed to settle for 1ms before the meter is read. This process is repeated for all codes to generate the measurements for INL and DNL results and is shown in Figure 2 - 9.
EVM Performance Figure 2 - 9.
EVM Performance Figure 2 - 10.
EVM Performance Figure 2 - 11.
EVM Performance Figure 2 - 12.
Bill of Materials 2.3 Bill of Materials Table 2 - 1. Parts List Item # Qty Designator Manufacturer Part Number Description 1 2 C9 C10 Panasonic ECUV1H105JCH 1 µF, 1206 Multilayer ceramic capacitor 2 4 C1 C2 C3 C7 Panasonic ECJ3VB1C104K 0.
2-12
Chapter 3 EVM Operation This chapter covers in detail the operation of the EVM to provide guidance to the user in evaluating the onboard DAC and how to interface the EVM to a specific host processor. Refer to the DAC8574 data sheet (SLAS377A), for information about its serial interface and other related topics. The EVM board is factory tested and configured to operate in the bipolar output mode. Topic Page 3.1 Factory Default Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Factory Default Setting 3.1 Factory Default Setting The EVM board is set to its default configuration from the factory as described in Table 3 - 1 to operate in gain of 2 configuration (0 V to +10-V) mode of operation. Table 3 - 1. Factory Default Jumper Setting Reference Jumper Position W1 1-2 Analog supply for the DAC8574 is +5VA. W2 1-2 DAC output A (VOUTA) is routed to J4 - 2. W3 OPEN W4 1-2 Onboard external buffered reference U3 is routed to VREFH.
EVM Stacking 3.3 EVM Stacking The stacking of EVMs is possible if there is a need to evaluate two DAC8574s to yield a total of eight channel outputs. A maximum of two EVMs are allowed since the output terminal, J4, dictates the number of DAC channels that can be connected without colliding. Table 3 - 2 shows how the DAC output channels are mapped into the output terminal, J4, with respect to the jumper position of W2, W11, W12 and W13. Table 3 - 2.
The Output Op-Amp 3.4.1 Unity Gain Output The buffered output configuration can be used to prevent loading the DAC8574, though it may present some slight distortion because of the feedback resistor and capacitor. Users can tailor the feedback circuit to closely match their desired wave shape by simply desoldering R7 and C11 and replacing it with the desired values. You can also simply get rid of R7 and C11 altogether, and just solder a 0-Ω resistor in replacement of R7, if desired.
Optional Signal Conditioning Op-Amp (U8B) In unity gain, the OPA627 op-amp, U2, performs very well with very large capacitive loads. Increasing the gain enhances the amplifier’s ability to drive even more capacitance, and adding a load resistor would even improve the capacitive load drive capability. Table 3 - 5 shows the jumper setting configuration for a capacitive load drive. Table 3 - 5.
Jumper Setting 3.6 Jumper Setting Table 3 - 6 shows the function of each specific jumper setting of the EVM. Table 3 - 6. Jumper Setting Functions Reference W1 W2 Jumper Setting 1 3 1 3 1 3 1 3 Function +5-V analog supply is selected for AVDD. +3.3-V analog supply is selected for AVDD. Routes VOUTA to J4 - 2. Routes VOUTA to J4 - 10.
Schematic Reference W12 W13 Jumper Setting 1 3 1 3 1 3 1 3 Function Routes VOUTC to J4 - 6. Routes VOUTC to J4 - 14. Routes VOUTD to J4 - 8. Routes VOUTD to J4 - 16. Disconnects the inverting input of the output op amp, U2, from AGND. W15 Connects the inverting input of the output op amp, U2, to AGND for gain of 2. Legend: Indicates the corresponding pins that are shorted or closed. 3.7 Schematic The schematic is located on the following page.
1 2 3 +5VA W1 VDD 4 (A3) GPIO2 R27 GPIO3 R28 C1 0.1µF C5 10µF C6 10µF C2 0.