Datasheet

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DAC8571
SLAS373A – DECEMBER 2002 – REVISED JULY 2003
TIMING CHARACTERISTICS (continued)
V
DD
= +2.7 V to +5.5 V; R
L
= 2 k Ω to GND; all specifications -40 °C to 105 °C (unless otherwise noted)
SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Standard mode 20 + 0.1C
B
1000 ns
Rise time of SCL signal after a
Fast mode 20 + 0.1C
B
300 ns
t
RCL1
repeated START condition, and
High-speed mode, C
B
- 100pF max 10 80 ns
after an acknowledge BIT
High-speed mode, C
B
- 400pF max 20 1600 ns
Standard mode 20 + 0.1C
B
300 ns
Fast mode 20 + 0.1C
B
300 ns
t
FCL
Fall time of SCL signal
High-speed mode, C
B
- 100pF max 10 40 ns
High-speed mode, C
B
- 400pF max 20 80 ns
Standard mode 20 + 0.1C
B
1000 ns
Fast mode 20 + 0.1C
B
300 ns
t
RCA
Rise time of SDA signal
High-speed mode, C
B
- 100pF max 10 80 ns
High-speed mode, C
B
- 400pF max 20 160 ns
Standard mode 20 + 0.1C
B
300 ns
Fast mode 20 + 0.1C
B
300 ns
t
FDA
Fall time of SDA signal
High-speed mode, C
B
- 100pF max 10 80 ns
High-speed mode, C
B
- 400pF max 20 160 ns
Standard mode 4.0 µs
t
SU
; t
STO
Setup time for STOP condition Fast mode 600 ns
High-speed mode 160 ns
C
B
Capacitive load for SDA and SCL 400 pF
Fast mode 50 ns
t
SP
Pulse width of spike suppressed
High-speed mode 10 ns
Standard mode
Noise margin at the HIGH level for
V
NH
each connected device (including Fast mode 0.2V
DO
V
hysteresis)
High-speed mode
Standard mode
Noise margin at the LOW level for
V
NL
each connected device (including Fast mode 0.1V
DO
V
hysteresis)
High-speed mode
5