Datasheet
DAC
Register
REF(+)
ResistorString
REF( )-
V L
REF
V H
REF
V
OUT
X
62kW
50kW 50kW
V =
OUT
V Gain´ ´
REF
D
IN
2
n
V
REF
R
R
R
R
V
REF
2
R
DIVIDER
ToOutputAmplifier
(2xGain)
DAC7568
DAC8168
DAC8568
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SBAS430D –JANUARY 2009–REVISED MAY 2012
THEORY OF OPERATION
DIGITAL-TO-ANALOG CONVERTER (DAC)
The DAC7568, DAC8168, and DAC8568 architecture
consists of eight string DACs each followed by an
output buffer amplifier. The devices include an
internal 2.5V reference with 2ppm/°C temperature
drift performance, and offer either 5V or 2.5V full
scale output voltage. Figure 120 shows a principal
block diagram of the DAC architecture.
Figure 120. Device Architecture
The input coding to the DAC7568, DAC8168, and
DAC8568 is straight binary, so the ideal output
voltage is given by Equation 1:
(1)
Where:
D
IN
= decimal equivalent of the binary code that
is loaded to the DAC register. It can range from 0
Figure 121. Resistor String
to 4095 for DAC7568 (12 bit), 0 to 16,383 for
DAC8168 (14 bit), and 0 to 65535 for DAC8568
(16 bit).
OUTPUT AMPLIFIER
n = resolution in bits; either 12 (DAC7568), 14
(DAC8168) or 16 (DAC8568)
The output buffer amplifier is capable of generating
rail-to-rail voltages on its output, giving a maximum
Gain = 1 for A/B grades or 2 for C/D grades.
output range of 0V to AV
DD
. It is capable of driving a
load of 2kΩ in parallel with 3000pF to GND. The
RESISTOR STRING
source and sink capabilities of the output amplifier
The resistor string section is shown in Figure 121. It
can be seen in the Typical Characteristics. The
is simply a string of resistors, each of value R. The
typical slew rate is 0.75V/μs, with a typical full-scale
code loaded into the DAC register determines at
settling time of 5μs with the output unloaded.
which node on the string the voltage is tapped off to
be fed into the output amplifier by closing one of the
switches connecting the string to the amplifier. It is
monotonic because it is a string of resistors.
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