Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- THERMAL INFORMATION
- ELECTRICAL CHARACTERISTICS
- PIN CONFIGURATIONS
- TIMING REQUIREMENTS
- TABLES OF GRAPHS
- TYPICAL CHARACTERISTICS: Internal Reference
- TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V
- TYPICAL CHARACTERISTICS: DAC at AVDD = 3.6 V
- TYPICAL CHARACTERISTICS: DAC at AVDD = 2.7 V
- THEORY OF OPERATION
- APPLICATION INFORMATION
- Revision History
V X
OUT
Amplifier
Power-Down
Circuitry
Resistor
Network
Resistor
String
DAC
DAC8562, DAC8563
DAC8162, DAC8163
DAC7562, DAC7563
www.ti.com
SLAS719D –AUGUST 2010–REVISED AUGUST 2012
POWER-DOWN MODES
The DAC756x, DAC816x, and DAC856x have two separate sets of power-down commands. One set is for the
DAC channels and the other set is for the internal reference. The internal reference is forced to a powered down
state while both DAC channels are powered down, and is only enabled if any DAC channel is also in normal
mode of operation. For more information on the internal reference control, see the INTERNAL REFERENCE
ENABLE REGISTER section.
DAC Power-Down Commands
The DAC756x, DAC816x, and DAC856x DACs use four modes of operation. These modes are accessed by
setting command bits C2, C1, and C0, and power-down register bits DB5 and DB4. The command bits must be
set to 100. Once the command bits are set correctly, the four different power down modes are software
programmable by setting bits DB5 and DB4 in the shift register. Table 13 or Table 16 through Table 18 shows
how to control the operating mode with data bits PD1 (DB5), PD0 (DB4), DB1, and DB0.
Table 16. DAC Power Mode Register Command Structure
Command Address Data
X X 1 0 0 X X X X X X X X X X X X X PD1 PD0 X X DAC-B DAC-A
DB23 DB0
Table 17. DAC-n Operating Modes
PD1 (DB5) PD0 (DB4) DAC OPERATING MODES
0 0 Power up selected DACs (normal mode, default)
0 1 Power down selected DACs 1 kΩ to GND
1 0 Power down selected DACs 100 kΩ to GND
1 1 Power down selected DACs Hi-Z to GND
Table 18. DAC-n Selection for Operating Modes
DB1/DB0 Operating Mode
0 DAC-n does not change operating mode
1 DAC-n operating mode set to value on PD1 and PD0
It is possible to write to the DAC register/buffer of the DAC channel that is powered down. When the DAC
channel is then powered up, it powers up to this new value.
The advantage of the available power-down modes is that the output impedance of the device is known while it is
in power-down mode. As described in Table 17, there are three different power-down options. V
OUT
can be
connected internally to GND through a 1-kΩ resistor, a 100-kΩ resistor, or open-circuited (Hi-Z). The DAC
powerdown circuitry is shown in Figure 93.
Figure 93. Output Stage
Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback 35
Product Folder Links: DAC8562 DAC8563 DAC8162 DAC8163 DAC7562 DAC7563