Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- THERMAL INFORMATION
- ELECTRICAL CHARACTERISTICS
- PIN CONFIGURATIONS
- TIMING REQUIREMENTS
- TABLES OF GRAPHS
- TYPICAL CHARACTERISTICS: Internal Reference
- TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V
- TYPICAL CHARACTERISTICS: DAC at AVDD = 3.6 V
- TYPICAL CHARACTERISTICS: DAC at AVDD = 2.7 V
- THEORY OF OPERATION
- APPLICATION INFORMATION
- Revision History
DAC8562, DAC8563
DAC8162, DAC8163
DAC7562, DAC7563
www.ti.com
SLAS719D –AUGUST 2010–REVISED AUGUST 2012
POWER-ON RESET
Power-On Reset to Zero-scale
The DAC7562, DAC8162, and DAC8562 contain a power-on-reset circuit that controls the output voltage during
power up. All device registers are reset as shown in Table 6. At power up all DAC registers are filled with zeros
and the output voltages of all DAC channels are set to zero volts. Each DAC channel remains that way until a
valid load command is written to it. The power-on reset is useful in applications where it is important to know the
state of the output of each DAC while the device is in the process of powering up. No device pin should be
brought high before power is applied to the device. The internal reference is disabled by default and remains that
way until a valid reference-change command is executed.
Power-On Reset to Mid-scale
The DAC7563, DAC8163, and DAC8563 contain a power-on reset circuit that controls the output voltage during
power up. At power up, all DAC registers are reset to mid-scale code and the output voltages of all DAC
channels are set to V
REFIN
/2 volts. Each DAC channel remains that way until a valid load command is written to
it. The power-on reset is useful in applications where it is important to know the state of the output of each DAC
while the device is in the process of powering up. No device pin should be brought high before power is applied
to the device. The internal reference is powered off/down by default and remains that way until a valid reference-
change command is executed. If using an external reference, it is acceptable to power on the V
REFIN
either at the
same time as or after AV
DD
is applied.
Table 6. DACxx62 and DACxx63 Power-On Reset Values
REGISTER DEFAULT SETTING
DACxx62 Zero-scale
DAC and Input registers
DACxx63 Mid-scale
LDAC registers LDAC pin enabled for both channels
Power-down registers DACs powered up
Internal reference register Internal reference disabled
Gain registers Gain = 1 for both channels
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