Datasheet

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DAC8555
FEATURES DESCRIPTION
APPLICATIONS
Data
BufferA
Buffer
Control
18
8
Power-Down
ControlLogic
Resistor
Network
ENABLE
RSTSEL
SYNC
LDACRST
DAC
RegisterA
DACA
Data
BufferD
DAC
RegisterD
DACD
Register
Control
24-Bit
Serial-to-Parallel
ShiftRegister
SCLK
D
IN
V L
REF
V H
REF
AV
DD
IOV
DD
V A
OUT
V B
OUT
V C
OUT
V D
OUT
DAC8555
SLAS475B NOVEMBER 2005 REVISED OCTOBER 2006
16-BIT, QUAD CHANNEL, ULTRA-LOW GLITCH, VOLTAGE OUTPUT
DIGITAL-TO-ANALOG CONVERTER
Relative Accuracy: 4LSB
The DAC8555 is a 16-bit, quad channel, voltage
output digital-to-analog converter (DAC) offering
Glitch Energy: 0.15nV-s
low-power operation and a flexible serial host
MicroPower Operation:
interface. It offers monotonicity, good linearity, and
150 µ A per Channel at 2.7V
exceptionally low glitch. Each on-chip precision
Power-On Reset to Zero-Scale or Midscale
output amplifier allows rail-to-rail output swing to be
achieved over the supply range of 2.7V to 5.5V. The
Power Supply: +2.7V to +5.5V
device supports a standard 3-wire serial interface
16-Bit Monotonic Over Temperature
capable of operating with input data clock
Settling Time: 10 µ s to ± 0.003% FSR
frequencies up to 50MHz for IOV
DD
= 5V.
Ultra-Low AC Crosstalk: –100dB Typ
The DAC8555 requires an external reference voltage
Low-Power SPI™-Compatible Serial Interface
to set the output range of each DAC channel. Also
with Schmitt-Triggered Inputs: Up to 50MHz
incorporated into the device is a power-on reset
circuit, which can be programmed to ensure that the
On-Chip Output Buffer Amplifier with
DAC outputs power up at zero-scale or midscale and
Rail-to-Rail Operation
remain there until a valid write takes place. The
Double Buffered Input Architecture
device also has the capability to function in both
Simultaneous or Sequential Output Update
binary and 2's complement mode. The DAC8555
and Power-Down
provides a per channel power-down feature,
accessed over the serial interface, that reduces the
Binary and 2's Complement Capability
current consumption to 175nA per channel at 5V.
Asynchronous Clear to Zero-Scale and
The low-power consumption of this device in normal
Midscale
operation makes it ideally suited to portable battery-
1.8V to 5.5V Logic Compatibility
operated equipment and other low-power
Available in a TSSOP-16 Package
applications. The power consumption is 5mW at 5V,
reducing to 4 µ W in power-down mode.
The DAC8555 is available in a TSSOP-16 package
Portable Instrumentation
with a specified operating temperature range of
Closed-Loop Servo-Control
–40 ° C to +105 ° C.
Process Control
FUNCTIONAL BLOCK DIAGRAM
Data Acquisition Systems
Programmable Attenuation
PC Peripherals
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI, QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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