Datasheet

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DAC8554
SLAS431B – JUNE 2005 – REVISED OCTOBER 2006
ELECTRICAL CHARACTERISTICS (continued)
V
DD
= 2.7V to 5.5V,– 40 ° C to +105 ° C range (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Slew rate 1.8 V/ µ s
R
L
= ∞ 470 pF
Capacitive load stability
R
L
= 2k Ω 1000 pF
Code change glitch impulse 1LSB change around major carry 0.15
nV-s
Digital feedthrough 0.15
Full-scale swing on adjacent channel.
DC crosstalk 0.25 LSB
AV
DD
= 5V, V
REF
= 4.096V
AC crosstalk 1kHz sine wave –100 dB
DC output impedance At mid-point input 1 Ω
AV
DD
= 5V 50
Short-circuit current mA
AV
DD
= 3V 20
Coming out of power-down mode, AV
DD
= 5V 2.5
Power-up time µ s
Coming out of power-down mode, AV
DD
= 3V 5
AC PERFORMANCE
SNR 95
THD –85
BW = 20kHz, AV
DD
= 5V, F
OUT
= 1kHz,
dB
1st 19 harmonics removed for SNR calculation
SFDR 87
SINAD 84
REFERENCE INPUT
V
REF
H Voltage V
REF
L < V
REF
H, AV
DD
– (V
REF
H + V
REF
L)/2 > 1.2V 0 AV
DD
V
V
REF
L Voltage V
REF
L < V
REF
H , AV
DD
– (V
REF
H + V
REF
L)/2 > 1.2V 0 AV
DD
/2 V
V
REF
L = GND, V
REF
H = AV
DD
= 5V 180 250 µ A
Reference input current
V
REF
L = GND, V
REF
H = AV
DD
= 3V 120 200 µ A
Reference input impedance V
REF
L < V
REF
H 31 k Ω
LOGIC INPUTS
(3)
2.7V ≤ IOV
DD
≤ 5.5V 0.3 × IOV
DD
V
IL
Logic input LOW voltage V
1.8V ≤ IOV
DD
≤ 2.7V 0.1 × IOV
DD
2.7 ≤ IOV
DD
≤ 5.5V 0.7 × IOV
DD
V
IH
Logic input HIGH voltage V
1.8 ≤ IOV
DD
< 2.7V 0.95 × IOV
DD
Pin capacitance 3 pF
POWER REQUIREMENTS
AV
DD
2.7 5.5
V
IOV
DD
1.8 5.5
I
DD
(normal mode) Input code = 32768, no load, reference current not included
IOI
DD
10 20 µ A
AV
DD
= 3.6V to 5.5V V
IH
= IOV
DD
and V
IL
= GND 0.65 0.95
mA
AV
DD
= 2.7V to 3.6V 0.6 0.9
I
DD
(all power-down modes)
AV
DD
= 3.6V to 5.5V V
IH
= IOV
DD
and V
IL
= GND 0.7 2
µ A
AV
DD
= 2.7V to 3.6V 0.4 2
POWER EFFICIENCY
I
OUT
/I
DD
I
L
= 2mA, AV
DD
= 5V 89 %
TEMPERATURE RANGE
Specified performance –40 +105 ° C
(3) Ensured by design and characterization; not production tested.
3
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