Datasheet

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DAC8554
SLAS431B JUNE 2005 REVISED OCTOBER 2006
Example 3: Power-Down DAC A and DAC B to 1k and Power-Down DAC C and DAC D to 100k
Simultaneously
Write power-down command to data buffer A: DAC A to 1k .
A1 A0 LD1 LD0 DC DAC Sel 1 DAC Sel 0 PD0 DB15 DB14 DB13
0 0 0 0 X 0 0 1 0 1 X
Write power-down command to data buffer B: DAC B to 1k .
A1 A0 LD1 LD0 DC DAC Sel 1 DAC Sel 0 PD0 DB15 DB14 DB13
0 0 0 0 X 0 1 1 0 1 X
Write power-down command to data buffer C: DAC C to 1k .
A1 A0 LD1 LD0 DC DAC Sel 1 DAC Sel 0 PD0 DB15 DB14 DB13
0 0 0 0 X 1 0 1 1 0 X
Write power-down command to data buffer D: DAC D to 100k and simultaneously update all DACs.
A1 A0 LD1 LD0 DC DAC Sel 1 DAC Sel 0 PD0 DB15 DB14 DB13
0 0 1 0 X 1 1 1 1 0 X
The DAC A, DAC B, DAC C, and DAC D analog outputs simultaneously power-down to each respective
specified mode upon completion of the 4th write sequence.
Example 4: Power-Down DAC A Through DAC D to High-Impedance Sequentially:
Write power-down command to data buffer A and load DAC A: DAC A output = Hi-Z:
A1 A0 LD1 LD0 DC DAC Sel 1 DAC Sel 0 PD0 DB15 DB14 DB13
0 0 0 1 X 0 0 1 1 1 X
Write power-down command to data buffer B and load DAC B: DAC B output = Hi-Z:
A1 A0 LD1 LD0 DC DAC Sel 1 DAC Sel 0 PD0 DB15 DB14 DB13
0 0 0 1 X 0 1 1 1 1 x
Write power-down command to data buffer C and load DAC C: DAC C output = Hi-Z:
A1 A0 LD1 LD0 DC DAC Sel 1 DAC Sel 0 PD0 DB15 DB14 DB13
0 0 0 1 X 1 0 1 1 1 X
Write power-down command to data buffer D and load DAC D: DAC D output = Hi-Z:
A1 A0 LD1 LD0 DC DAC Sel 1 DAC Sel 0 PD0 DB15 DB14 DB13
0 0 0 1 X 1 1 1 1 1 X
The DAC A, DAC B, DAC C, and DAC D analog outputs sequentially power-down to high-impedance upon
completion of the 1st, 2nd, 3rd, and 4th write sequences, respectively.
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