Datasheet

V
OUT
Resistor
String
DAC
Power-Down
Circuitry
Resistor
Network
V
FB
Amplifier
DAC8550
www.ti.com
SLAS476E MARCH 2006REVISED MARCH 2012
POWER-DOWN MODES impedance of the device is known while in power-
down mode. There are three different options. The
The DAC8550 supports four separate modes of
output is connected internally to GND through a 1k
operation. These modes are programmable by setting
resistor, a 100k resistor, or it is left open-circuited
two bits (PD1 and PD0) in the control register.
(High-Z). The output stage is illustrated in Figure 49.
Table 1 shows how the state of the bits corresponds
to the mode of operation of the device.
Table 1. Operating Modes
PD1 PD0
(DB17) (DB16) OPERATING MODE
0 0 Normal operation
Power-down modes
0 1 Output typically 1k to GND
1 0 Output typically 100k to GND
1 1 High-Z
Figure 49. Output Stage During Power-Down
When both bits are set to '0', the device works
normally with a typical current consumption of 200μA
at 5V. However, for the three power-down modes, the
All analog circuitry is shut down when the power-
supply current falls to 200nA at 5V (50nA at 3V). Not
down mode is activated. However, the contents of the
only does the supply current fall, but the output stage
DAC register are unaffected when in power-down.
is also internally switched from the output of the
The time to exit power-down is typically 2.5μs for V
DD
amplifier to a resistor network of known values. The
= 5V, and 5μs for V
DD
= 3V. See the Typical
advantage with this configuration is that the output
Characteristics for more information.
Copyright © 2006–2012, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): DAC8550