Datasheet
www.ti.com
TIMING CHARACTERISTICS
t
W
1 t
W
5 t
W
2
t
su
1 t
h
1 t
su
3 t
h
3
t
h
4
t
su
2
t
h
2
t
d
1
t
su
4
t
h
2
t
w
4t
W
3
t
s
±0.003% of FSR Error Bands
Data Out ValidData In Valid
CS
R/W
Data I/O
DB0−DB15
LDAC
V
(OUT)
t
W
6
t
W
7
t
s
V
OUT
RST
+FS
DAC8544
SLAS420A – MAY 2004 – REVISED JUNE 2005
IOV
DD
= 1.8 V to 5.5 V; V
DD
= 2.7 V to 5.5 V; R
L
= 2 k Ω to GND; C
L
= 200 pF to GND; all specifications –40°C to 85°C (unless
otherwise noted)
MIN TYP MAX UNIT
t
w
1 Pulse width: CS low for valid write 20 ns
t
su
1 Setup time: R/ W low before CS falling 0 ns
t
su
2 Setup time: data in valid before CS falling 0 ns
t
h
1 Hold time: R/ W low after CS rising 10 ns
t
h
2 Hold time: data in valid after CS rising 15 ns
t
w
2 Pulse width: CS low for valid read 40 ns
t
su
3 Setup time: R/ W high before CS falling 30 ns
t
d
1 Delay time: data out valid after CS falling 60 80 ns
t
h
3 Hold time: R/ W high after CS rising 10 ns
t
h
4 Hold time: data out valid after CS rising 5 20 ns
t
su
4 Setup time: LDAC rising after CS falling 10 ns
t
d
2 Delay time: CS low after LDAC rising 50 ns
t
w
3 Pulse width: LDAC low 40 ns
t
w
4 Pulse width: LDAC high 40 ns
t
w
5 Pulse width: CS high 80 ns
t
w
6 Pulse width: RST low 40 ns
t
w
7 Pulse width: RST high 40 ns
t
S
V OUT Settling time (settling time for a full-scale code change) 10 µ s
Data Read/Write Timing
Reset Timing
4