Datasheet


SLAS353 − DECEMBER 2001
2
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
AVAILABLE OPTIONS
PRODUCT
PACKAGE
PACKAGE
DRAWING NUMBER
T
A
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA
DAC8541
32-TQFP
PBS
−40°C to 85°C
E41Y
DAC8541Y/250
Tape and Reel
DAC8541 32-TQFP PBS −40°C to 85°C E41Y
DAC8541Y/2K
Tape and Reel
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
†
AV
DD
to AGND −0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DV
DD
to DGND −0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage to DGND −0.3 V to DV
DD
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
OUT
to AGND −0.3 V to AV
DD
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating temperature range −40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction temperature, T
J
max 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
electrical characteristics, DV
DD
= 1.8 V to 5.5 V; AV
DD
= 2.7 V to 5.5 V; R
L
= 2 kΩ to AGND; C
L
= 200
pF to AGND; all specifications –40°C to 85°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC PERFORMANCE (see Note 1)
Resolution 16 Bits
Relative accuracy ±0.098 %FSR
Differential nonlinearity 16-Bit monotonic ±1 LSB
Zero code error All zeroes loaded to DAC register 5 20 mV
Full-scale error All ones loaded to DAC register –0.15 –0.8 %FSR
Gain error ±0.8 %FSR
Zero code error drift ±20 µV/°C
Gain temperature coefficient ±5
ppm of
FSR/°C
OUTPUT CHARACTERISTICS (see Note 2)
Output voltage range 2×V
REF
L V
REF
H V
Output voltage settling time (full scale)
R
L
= 2 kΩ; 0 pF < C
L
< 200 pF 8 10
µs
Output voltage settling time (full scale)
R
L
= 2 kΩ; C
L
= 500 pF 12
µ
s
Slew rate 1 V/µs
Capacitive load stability
R
L
= ∞ 470
pF
Capacitive load stability
R
L
= 2 kΩ 1000
pF
Digital-to-analog glitch impulse 1 LSB change around major carry (see Note 3) 20 nV−s
Digital feedthrough 0.5 nV−s
DC output impedance 1 Ω
Short circuit current
AV
DD
= 5 V 50
mA
Short circuit current
AV
DD
= 3 V 20
mA
Power-up time
Coming out of power-down mode, AV
DD
= 5 V 2.5
s
Power-up time
Coming out of power-down mode, AV
DD
= 3 V 5
µs
NOTES: 1. Linearity calculated using a reduced code range of 485 to 64714. Output unloaded.
2. Assured by design and characterization, not production tested.
3. Specification for code changes at each N x 4096 code boundary.