Datasheet
DAC8534
14
SBAS254D
www.ti.com
OPERATION EXAMPLES
Example 1: Write to Data Buffer A; Through Buffer D; Load DAC A Through DAC D Simultaneously
• 1st—Write to Data Buffer A:
• 2nd—Write to Data Buffer B:
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 ...... DB1 DB0
0000X000D15..... D1 D0
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 ...... DB1 DB0
0000X010D15..... D1 D0
• 2nd—Write to Data Buffer B and Load DAC B: DAC B output settles to specified value upon completion:
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 ...... DB1 DB0
0001X000D15..... D1 D0
• 3rd—Write to Data Buffer C and Load DAC C: DAC C output settles to specified value upon completion:
• 4th—Write to Data Buffer D and Load DAC D: DAC D output settles to specified value upon completion:
After completion of each write cycle, DAC analog output settles to the voltage specified.
Example 3: Power-Down DAC A and DAC B to 1kΩ and Power-Down DAC C and DAC D to 100kΩ Simultaneously
• Write power-down command to Data Buffer A: DAC A to 1kΩ.
The DAC A, DAC B, DAC C, and DAC D analog outputs simultaneously settle to the specified values upon completion of the
4th write sequence. (The “Load” command moves the digital data from the data buffer to the DAC register at which time the
conversion takes place and the analog output is updated. “Completion” occurs on the 24th falling SCLK edge after
SYNC
LOW.)
Example 2: Load New Data to DAC A Through DAC D Sequentially
• 1st—Write to Data Buffer A and Load DAC A: DAC A output settles to specified value upon completion:
• 3rd—Write to Data Buffer C:
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 ...... DB1 DB0
0000X100D15..... D1 D0
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 ...... DB1 DB0
0001X010D15..... D1 D0
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 ...... DB1 DB0
0001X100D15..... D1 D0
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 ...... DB1 DB0
0001X110D15..... D1 D0
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 DB14 DB13 ........
0000X00101X........
• 4th—Write to Data Buffer D and simultaneously update all DACs:
A1 A0 LD1 LD0 DC
DAC Sel 1 DAC Sel
0 PD0 DB15 ...... DB1 DB0
0010X110D15..... D1 D0
Resistor
String DAC
Amplifier
Power-down
Circuitry
Resistor
Network
V
OUT
X
FIGURE 5. Output Stage During Power-Down (High-Impedance).