Datasheet

DAC8532
4
SBAS246A
www.ti.com
SERIAL WRITE OPERATION
SCLK 1 24
SYNC
D
IN
DB23 DB0 DB23
t
8
t
3
t
2
t
7
t
4
t
5
t
6
t
1
t
9
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNITS
t
1
(3)
SCLK Cycle Time
V
DD
= 2.7V to 3.6V 50 ns
V
DD
= 3.6V to 5.5V 33 ns
t
2
SCLK HIGH Time
V
DD
= 2.7V to 3.6V 13 ns
V
DD
= 3.6V to 5.5V 13 ns
t
3
SCLK LOW Time
V
DD
= 2.7V to 3.6V 22.5 ns
V
DD
= 3.6V to 5.5V 13 ns
t
4
SYNC to SCLK Rising
Edge Setup Time
V
DD
= 2.7V to 3.6V 0 ns
V
DD
= 3.6V to 5.5V 0 ns
t
5
Data Setup Time
V
DD
= 2.7V to 3.6V 5 ns
V
DD
= 3.6V to 5.5V 5 ns
t
6
Data Hold Time
V
DD
= 2.7V to 3.6V 4.5 ns
V
DD
= 3.6V to 5.5V 4.5 ns
t
7
24th SCLK Falling Edge to
SYNC Rising Edge
V
DD
= 2.7V to 3.6V 0 ns
V
DD
= 3.6V to 5.5V 0 ns
t
8
Minimum SYNC HIGH Time
V
DD
= 2.7V to 3.6V 50 ns
V
DD
= 3.6V to 5.5V 33 ns
t
9
24th SCLK Falling Edge to
SYNC Falling Edge V
DD
= 2.7V to 5.5V 100 ns
NOTES: (1) All input signals are specified with t
R
= t
F
= 5ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2. (2) See Serial Write Operation timing
diagram, below. (3) Maximum SCLK frequency is 30MHz at V
DD
= +3.6V to +5.5V and 20MHz at V
DD
= +2.7V to +3.6V.
TIMING CHARACTERISTICS
(1, 2)
V
DD
= +2.7V to +5.5V; all specifications –40°C to +105°C unless otherwise noted.
DAC8532