Datasheet
3
DAC8532
SBAS246A
www.ti.com
REFERENCE INPUT
Reference Current V
REF
= V
DD
= +5V 67 90 µA
V
REF
= V
DD
= +3V 40 54 µA
Reference Input Range 0 V
DD
V
Reference Input Impedance 75 kΩ
LOGIC INPUTS
(2)
Input Current ±1 µA
V
IN
L, Input LOW Voltage V
DD
= +5V 0.8 V
V
IN
L, Input LOW Voltage V
DD
= +3V 0.6 V
V
IN
H, Input HIGH Voltage V
DD
= +5V 2.4 V
V
IN
H, Input HIGH Voltage V
DD
= +3V 2.1 V
Pin Capacitance 3pF
POWER REQUIREMENTS
V
DD
2.7 5.5 V
I
DD
(normal mode)
DAC Active and Excluding Load Current
V
DD
= +3.6V to +5.5V V
IH
= V
DD
and V
IL
= GND 500 800 µA
V
DD
= +2.7V to +3.6V V
IH
= V
DD
and V
IL
= GND 450 750 µA
I
DD
(all power-down modes)
V
DD
= +3.6V to +5.5V V
IH
= V
DD
and V
IL
= GND 0.2 1 µA
V
DD
= +2.7V to +3.6V V
IH
= V
DD
and V
IL
= GND 0.05 1 µA
POWER EFFICIENCY
I
OUT
/I
DD
I
LOAD
= 2mA, V
DD
= +5V 89 %
TEMPERATURE RANGE
Specified Performance –40 +105 °C
PARAMETER CONDITIONS MIN TYP MAX UNITS
ELECTRICAL CHARACTERISTICS (Cont.)
V
DD
= +2.7V to +5.5V. –40°C to +105°C, unless otherwise specified.
DAC8532
NOTES: (1) Linearity calculated using a reduced code range of 485 to 64714; output unloaded. (2) Ensured by design and characterization, not production tested.
PIN NAME DESCRIPTION
1V
DD
Power supply input, +2.7V to +5.5V.
2V
REF
Reference voltage input.
3V
OUT
B Analog output voltage from DAC B.
4V
OUT
A Analog output voltage from DAC A.
5 SYNC Level triggered SYNC input (active LOW). This is the
frame synchronization signal for the input data.
When SYNC goes LOW, it enables the input shift
register and data is transferred on the falling edge of
SCLK. The action specified by the 8-bit control byte
and 16-bit data word is executed following the 24th
falling SCLK clock edge (unless SYNC is taken
HIGH before this edge in which case the rising edge
of SYNC acts as an interrupt and the write sequence
is ignored by the DAC8532).
6 SCLK Serial Clock Input. Data can be transferred at rates
up to 30 MHz at 5V.
7D
IN
Serial Data Input. Data is clocked into the 24-bit
input shift register on each falling edge of the serial
clock input.
8 GND Ground reference point for all circuitry on the part.
PIN DESCRIPTIONS
PIN CONFIGURATION
Top View MSOP-8
V
DD
V
REF
V
OUT
B
V
OUT
A
GND
D
IN
SCLK
SYNC
1
2
3
4
8
7
6
5
DAC8532