Datasheet

13
DAC8532
SBAS246A
www.ti.com
OPERATION EXAMPLES
Example 1: Write to Data Buffer A; Write to Data Buffer B; Load DACA and DACB Simultaneously
• 1st—Write to Data Buffer A:
• 2nd—Write to Data Buffer B and Load DAC A and DAC B simultaneously:
Reserved Reserved LDB LDA DC Buffer Select PD1 PD0 DB15 ...... DB1 DB0
0000X000D15..... D1 D0
The DACA and DACB analog outputs simultaneously settle to the specified values upon completion of the 2
nd
write sequence.
(The “Load” command moves the digital data from the data buffer to the DAC register at which time the conversion takes place
and the analog output is updated. “Completion” occurs on the 24
th
falling SCLK edge after SYNC LOW.)
Example 2: Load New Data to DACA and DACB Sequentially
• 1st—Write to Data Buffer A and Load DAC A: DACA output settles to specified value on completion:
Reserved Reserved LDB LDA DC Buffer Select PD1 PD0 DB15 ...... DB1 DB0
0011X100D15..... D1 D0
• 2nd—Write to Data Buffer B and Load DAC B: DACB output settles to specified value on completion:
Reserved Reserved LDB LDA DC Buffer Select PD1 PD0 DB15 ...... DB1 DB0
0001X000D15..... D1 D0
After completion of the 1
st
write cycle, the DACA analog output settles to the voltage specified; upon completion of write cycle 2,
the DACB analog output settles.
Example 3: Power-Down DACA to 1kΩ and Power-Down DACB to 100kΩ Simultaneously
• 1st—Write power-down command to Data Buffer A:
Reserved Reserved LDB LDA DC Buffer Select PD1 PD0 DB15 ...... DB1 DB0
0010X100D15..... D1 D0
• 2nd—Write power-down command to Data Buffer B and Load DACA and DACB simultaneously:
Reserved Reserved LDB LDA DC Buffer Select PD1 PD0 DB15 ...... DB1 DB0
0000X001 Don’t Care
Reserved Reserved LDB LDA DC Buffer Select PD1 PD0 DB15 ...... DB1 DB0
0011X110 Don’t Care
The DACA and DACB analog outputs simultaneously power-down to each respective specified mode upon completion of the
2
nd
write sequence.
Example 4: Power-Down DACA and DACB to High Impedance Sequentially:
• 1st—Write power-down command to Data Buffer A and Load DAC A: DAC A output = High-Z:
Reserved Reserved LDB LDA DC Buffer Select PD1 PD0 DB15 ...... DB1 DB0
0001X011 Don’t Care
Reserved Reserved LDB LDA DC Buffer Select PD1 PD0 DB15 ...... DB1 DB0
0010X111 Don’t Care
• 2nd—Write power-down command to Data Buffer B and Load DAC B: DAC B output = High-Z:
The DACA and DACB analog outputs sequentially power-down to high impedance upon completion of the 1
st
and 2
nd
write
sequences, respectively.