Datasheet

Stand-Alone DC Mode Test
3-2
3.1 Stand-Alone DC Mode Test
The stand-alone mode (SAM) test is performed only in dc mode to quickly
verify the EVM board for proper functionality. Apply a dc power source of 3.3 V
to 5 V with the +supply connecting to J2–2 and referenced to J2–1. The power
indicator light, D3, should illuminate (green) once the power is applied.
To put the EVM board into stand-alone (or self-test) mode, the SW1B and
SW1A switches must be on. The self-test indicator light, D1, should also
illuminate to indicate that the EVM board is now in self-test mode.
3.1.1 Factory Default
The EVM board is set from the factory to the configuration listed in the table
below to operate with a single supply and unity gain buffer output through U12.
Table 3–1.Factory Default Jumper Setting
Reference
Jumper
Position
Function
W2 1–2 Serial data input from SAM circuit to the DAC data input pin, DIN
W3 1–2 Serial clock from SAM circuit to the DAC serial clock input pin, SCLK
W4 1–2 Frame sync signal from SAM circuit to the DAC sync input pin, SYNC
W5 1–2 SAM frame sync (FS) enabled for 24 SCLK cycles
W6 1–2 SAM data enabled for 24-bit serial data stream
W7 1–2 +Supply rail for U12 (signal conditioning circuit)
W8 1–2 GND for U12
W9 OPEN EVM power supply is not provided by the DSP starter kit (see Note).
W10 OPEN U12 is configured for unity gain.
W11 OPEN U12 is configured for unity gain.
W12 OPEN Bipolar supply is not selected.
W13 3–4 DAC output signal is conditioned and directed to J11, J3–1, and TP1 output terminals.
W14 1–2 Adjustable onboard reference voltage is selected.
J4 OPEN Enable parallel load of data inputs for U5, U6, and U7
Note: Jumper must be removed if external power is applied to avoid damaging the DSP Starter Kit.
3.1.2 Test Mode Operation
Briefly mentioned earlier, the switch bank SW1 provides control for the
stand-alone mode of operation. Switch SW1B controls the start and stop of the
SAM serial clock and SW1A controls the go signal for the SAM circuitry. When
both switches are on, the self-test indicator light (yellow) turns on.
Switch banks SW2 and SW3 provides the two control bits and the six MSB data
bits for the 16-bit DAC. SW2A and SW2B is the control bit generator, which
allows the DAC to be programmed into four separate modes of operation, see
Table 3–2. SW2A and SW2B maps out to PD1 (DB17) and PD0 (DB16)
respectively of the DAC data input register (16-bit version). Figure 3–1 shows