Datasheet

Resistor
StringDAC
Amplifier
Power-down
Circuitry
Resistor
Network
V
OUT
DAC8311
DAC8411
SBAS439B –AUGUST 2008–REVISED MAY 2013 www.ti.com
POWER-ON RESET TO ZERO-SCALE a resistor network of known values. The advantage of
this architecture is that the output impedance of the
The DAC8x11 contains a power-on reset circuit that
part is known while the part is in power-down mode.
controls the output voltage during power-up. On
There are three different options. The output is
power-up, the DAC register is filled with zeros and
connected internally to GND either through a 1kΩ
the output voltage is 0V. The DAC register remains
resistor or a 100kΩ resistor, or is left open-circuited
that way until a valid write sequence is made to the
(High-Z). See Figure 76 for the output stage.
DAC. This design is useful in applications where it is
important to know the state of the output of the DAC
while it is in the process of powering up.
The occuring power-on glitch impulse is only a few
mV (typically, 17mV; see Figure 29, Figure 70, or ).
POWER-DOWN MODES
The DAC8x11 contains four separate modes of
operation. These modes are programmable by setting
two bits (PD1 and PD0) in the control register.
Table 4 shows how the state of the bits corresponds
to the mode of operation of the device.
Figure 76. Output Stage During Power-Down
Table 4. Modes of Operation for the DAC8x11
All linear circuitry is shut down when the power-down
PD1 PD0 OPERATING MODE
mode is activated. However, the contents of the DAC
0 0 Normal Operation
register are unaffected when in power-down. The
Power-Down Modes
time to exit power-down is typically 50μs for AV
DD
=
5V and AV
DD
= 3V. See the Typical Characteristics
0 1 Output 1kΩ to GND
section for each device for more information.
1 0 Output 100kΩ to GND
1 1 High-Z
DAC NOISE PERFORMANCE
When both bits are set to 0, the device works
Typical noise performance for the DAC8x11 is shown
normally with a standard power consumption of
in Figure 31 and Figure 32. Output noise spectral
typically 80μA at 2.0V. However, for the three power-
density at the V
OUT
pin versus frequency is depicted
down modes, the typical supply current falls to 0.5μA
in Figure 31 for full-scale, midscale, and zero-scale
at 5V, 0.4μA at 3V, and 0.1μA at 2.0V. Not only does
input codes. The typical noise density for midscale
the supply current fall, but the output stage is also
code is 110nV/√Hz at 1kHz and at 1MHz.
internally switched from the output of the amplifier to
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